AD9259BCPZ-50(Rev0) データシートの表示（PDF） - Analog Devices
部品番号
コンポーネント説明
メーカー
AD9259BCPZ-50 Datasheet PDF : 52 Pages
| |||
AD9259
SPECIFICATIONS
AVDD = 1.8 V, DRVDD = 1.8 V, 2 V p-p differential input, 1.0 V internal reference, AIN = −0.5 dBFS, unless otherwise noted.
Table 1.
Parameter1
RESOLUTION
ACCURACY
No Missing Codes
Offset Error
Offset Matching
Gain Error
Gain Matching
Differential Nonlinearity (DNL)
Integral Nonlinearity (INL)
TEMPERATURE DRIFT
Offset Error
Gain Error
Reference Voltage (1 V Mode)
REFERENCE
Output Voltage Error (VREF = 1 V)
Load Regulation @ 1.0 mA (VREF = 1 V)
Input Resistance
ANALOG INPUTS
Differential Input Voltage Range (VREF = 1 V)
Common-Mode Voltage
Differential Input Capacitance
Analog Bandwidth, Full Power
POWER SUPPLY
AVDD
DRVDD
IAVDD
IDRVDD
Total Power Dissipation (Including Output Drivers)
Power-Down Dissipation
Standby Dissipation2
CROSSTALK
CROSSTALK (Overrange Condition)3
Temperature
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
AD9259-50
Min Typ
Max
14
Guaranteed
±1
±8
±2
±8
±0.5
±2
±0.3
±0.7
±0.5
±1.0
±1.5
±3.5
±2
±17
±21
±5
±30
3
6
2
AVDD/2
7
315
1.7 1.8
1.7 1.8
185
32.5
392
2
72
−100
−100
1.9
1.9
192.5
34.7
409
4
Unit
Bits
mV
mV
% FS
% FS
LSB
LSB
ppm/°C
ppm/°C
ppm/°C
mV
mV
kΩ
V p-p
V
pF
MHz
V
V
mA
mA
mW
mW
mW
dB
dB
1 See the AN-835 Application Note, “Understanding High Speed ADC Testing and Evaluation,” for a complete set of definitions and how these tests were completed.
2 Can be controlled via SPI.
3 Overrange condition is specific with 6 dB of the full-scale input range.
Rev. 0 | Page 3 of 52
Share Link: 