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AD9844A データシートの表示(PDF) - Analog Devices

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AD9844A Datasheet PDF : 16 Pages
First Prev 11 12 13 14 15 16
AD9844A
Table II. Operation Register Contents (Default Value x000)
Optical Black Clamp Reset
D10 D9 D8 D7 D6 D5
D4
Power-Down Modes
D3 D2
Channel Selection
D1 D0
0*
0* 0*
1** 0* 0 Enable Clamping
0 Normal 0 0 Normal Power
0 0 CCD-Mode
1 Disable Clamping 1 Reset All 0 1 Fast Recovery
0 1 AUX1-Mode
Registers 1 0 Standby
1 0 AUX2-Mode
to Default 1 1 Total Power-Down 1 1 Test Only
*Must be set to zero. **Set to one.
Table III. VGA Gain Register Contents (Default Value x096)
MSB
D10 D9
D8
X
0
0
1
1
1
1
LSB
D7
D6
D5
D4
D3
D2
D1
D0
Gain (dB)
0
1
0
1
1
1
1
1
2.0
1
1
1
1
1
1
1
0
35.965
1
1
1
1
1
1
1
1
36.0
Table IV. Clamp Level Register Contents (Default Value x080)
MSB
LSB
D10 D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
X
X
X
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
1
0
1
1
1
1
1
1
1
0
1
1
1
1
1
1
1
1
Clamp Level (LSB)
0
1
2
254
255
Table V. Control Register Contents (Default Value x000)
Data Out
D10 D9
D8 D7
DATACLK
D6
CLP/PBLK
D5
SHP/SHD
D4
CDS Gain
D3
D2 D1 D0
X 0 Enable
0* 0* 0 Rising Edge Trigger 0 Active Low 0 Active Low 0 Disabled** 0* 0* 0*
1 Three-State
1 Falling Edge Trigger 1 Active High 1 Active High 1 Enabled
*Must be set to zero.
**When D3 = 0 (CDS Gain Disabled), the CDS Gain Register is fixed at –4 dB (Code 63 dec).
Table VI. CDS Gain Register Contents (Default Value x000)
D10 D9
D8
MSB
D7
D6
D5
D4
D3
D2
D1
X
X
X
X
X
0
0
0
0
0
0
1
1
1
1
1
0
0
0
0
1
1
1
1
1
*Control Register Bit D3 must be set high for the CDS Gain Register to be used.
REV. 0
–11–
LSB
D0
Gain (dB) *
0
+4.3
0
+10.0
0
–2.0
1
+4.0

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