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AD9915-PCBZ データシートの表示（PDF） - Analog Devices

部品番号
コンポーネント説明
メーカー
AD9915-PCBZ
2.5 GSPS Direct Digital Synthesizer with 12-Bit DAC
ADI
Analog Devices ADI
AD9915-PCBZ Datasheet PDF : 47 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Data Sheet
Parameter
Min
DATA LATENCY (PIPELINE DELAY)
Single Tone Mode or Profile Mode
(Matched Latency Disabled)
Frequency
Phase
Amplitude
Single Tone Mode or Profile Mode
(Matched Latency Enabled)
Frequency
Phase
Amplitude
Modulation Mode with 32-Bit Parallel
Port (Match Latency Disabled)
Frequency
Phase
Amplitude
Modulation Mode with 32-Bit Parallel
Port (Match Latency Enabled)
Frequency
Phase
Amplitude
Sweep Mode (Match Latency Disabled)
Frequency
Phase
Amplitude
Sweep Mode (Match Latency Enabled)
Frequency
Phase
Amplitude
Typ Max
222
238
206
222
78
222
238
222
238
238
222
238
206
222
78
222
238
222
238
238
238
254
222
238
94
238
254
238
254
254
AD9915
Unit
Test Conditions/Comments
SYSCLK cycles = fS = system clock frequency
in GHz
SYSCLK cycles
SYSCLK cycles
SYSCLK cycles
SYSCLK cycles
SYSCLK cycles
OSK disabled
OSK enabled
OSK disabled
OSK enabled
OSK enabled
SYSCLK cycles
SYSCLK cycles
SYSCLK cycles
SYSCLK cycles
SYSCLK cycles
OSK disabled
OSK enabled
OSK disabled
OSK enabled
OSK enabled
SYSCLK cycles
SYSCLK cycles
SYSCLK cycles
SYSCLK cycles
SYSCLK cycles
OSK disabled
OSK enabled
OSK disabled
OSK enabled
OSK enabled
SYSCLK cycles
SYSCLK cycles
SYSCLK cycles
SYSCLK cycles
SYSCLK cycles
SYSCLK cycles
SYSCLK cycles
SYSCLK cycles
SYSCLK cycles
SYSCLK cycles
SYSCLK cycles
SYSCLK cycles
SYSCLK cycles
SYSCLK cycles
SYSCLK cycles
OSK disabled
OSK enabled
OSK disabled
OSK enabled
OSK enabled
OSK disabled
OSK enabled
OSK disabled
OSK enabled
OSK enabled
OSK disabled
OSK enabled
OSK disabled
OSK enabled
OSK enabled
Rev. F | Page 7 of 47

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