AD9920A データシートの表示（PDF） - Analog Devices
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AD9920A Datasheet PDF : 112 Pages
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AD9920A
Pin No.
E11
K9
K10
L10
B11
K11
C9
J6
J5
K5
F10
H9
G10
F11
H10
J11
B9
C6
C7
A8
A7
B7
B6
A6
A5
B4
A4
A3
B3
D1
D2
F1
F2
H1
H2
K1
K2
L2
L4
G9
G6
G5
E9
J9
F6
F5
E5
D10
F9
F7
Mnemonic
SYNC/RST
SL
SDATA
SCK
VDR_EN
XSUBCNT
SRSW
LEGEN
CLI
CLO
GPO1
GPO2
GPO3
GPO4
GPO7
GPO8
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
DCLK
H1
H2
H3
H4
H5
H6
H7
H8
HL
RG
V1A
V1B
V2A
V2B
V3A
V3B
V4
V5
V6
V7
V8
Type 1
DO
DI
DI
DI
DI
DI
DI
DI
DI
DO
DO
DO
DO
DO
DO
DO
DO
DO
DO
DO
DO
DO
DO
DO
DO
DO
DO
DO
DO
DO
DO
DO
DO
DO
DO
DO
DO
DO
DO
VO3
VO3
VO3
VO3
VO3
VO3
VO3
VO3
VO3
VO2
VO2
Description
SYNC Pin (Internal Pull-Up Resistor)/External Reset Input (Active Low).
3-Wire Serial Load Pulse (Internal Pull-Up Resistor).
3-Wire Serial Data.
3-Wire Serial Clock.
Enable V-Outputs When High.
XSUBCNT Input to SUBCK Buffer.
Slew Rate Control Enable. Tie to ground to disable.
Legacy Mode Enable Bar. Tie to ground for legacy 18-channel mode.
Reference Clock Input.
Clock Output for Crystal.
General-Purpose Output.
General-Purpose Output.
General-Purpose Output.
General-Purpose Output.
General-Purpose Output.
General-Purpose Output.
Data Output (LSB).
Data Output.
Data Output.
Data Output.
Data Output.
Data Output.
Data Output.
Data Output.
Data Output.
Data Output.
Data Output.
Data Output (MSB).
Data Clock Output.
CCD Horizontal Clock.
CCD Horizontal Clock.
CCD Horizontal Clock.
CCD Horizontal Clock.
CCD Horizontal Clock.
CCD Horizontal Clock.
CCD Horizontal Clock.
CCD Horizontal Clock.
CCD Horizontal Clock.
CCD Reset Gate Clock.
CCD Vertical Transfer Clock. Three-level output (XV1 + XV16).
CCD Vertical Transfer Clock. Three-level output (XV1 + XV17).
CCD Vertical Transfer Clock. Three-level output (XV2 + XV18).
CCD Vertical Transfer Clock. Three-level output (XV2 + XV19).
CCD Vertical Transfer Clock. Three-level output (XV3 + XV20).
CCD Vertical Transfer Clock. Three-level output. LEGEN is low, XV3 + XV21. LEGEN is high,
XV23 + XV21.
CCD Vertical Transfer Clock. Three-level output (XV4 + XV22).
CCD Vertical Transfer Clock. Three-level output. LEGEN is low, XV5 + XV23. LEGEN is high,
XV5 + GPO5.
CCD Vertical Transfer Clock. Three-level output. LEGEN is low, XV6 + XV24. LEGEN is high,
XV6 + GPO6.
CCD Vertical Transfer Clock. Two-level output (XV7).
CCD Vertical Transfer Clock. Two-level output (XV8).
Rev. B | Page 12 of 112
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