AD9951(Rev0) データシートの表示（PDF） - Analog Devices
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AD9951 Datasheet PDF : 28 Pages
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AD9951
Table 5. Register Map
Register
Name
(Serial
Address)
Bit
Range
<7:0>
Control
Function
Register
No.1
(CFR1)
(0x00)
<15:8>
<23:16>
<31:24>
Control
Function
Register No.
2 (CFR2)
(0x01)
<7:0>
<15:8>
Amplitude
Scale Factor
(ASF)
(0x02)
Amplitude
Ramp Rate
(ARR)
(0x03)
Frequency
Tuning
Word
(FTW0)
(0x04)
Phase
Offset Word
(POW0)
(0x05)
<23:16>
<7:0>
<15:8>
<7:0>
<7:0>
<15:8>
<23:16>
<31:24>
<7:0>
<15:8>
(MSB)
Bit 7
Digital
Power-
Down
Not Used
Automatic
Sync
Enable
Bit 6
Not Used
Not Used
Software
Manual
Sync
Bit 5
DAC
Power-
Down
AutoClr
Phase
Accum
Bit 4
Clock Input
Power-
Down
Enable SINE
Output
Bit 3
External
Power-
Down
Mode
Not Used
Bit 2
Not Used
Clear
Phase
Accum.
Not Used
Not Used
Load ARR
@ I/O UD
REFCLK Multiplier
0x00 or 0x01, or 0x02 or 0x03: Bypass Multiplier
0x04 to 0x14: 4× to 20× Multiplication
VCO
Range
Not Used
High
Speed
Sync
Enable
Hardware
Manual
Sync
Enable
Not Used
Amplitude Scale Factor Register <7:0>
Bit 1
(LSB)
Bit 0
SYNC_CLK
Out
Disable
Not
Used
SDIO
Input
Only
LSB First
OSK
Enable
Auto
OSK
Keying
Charge Pump Current
<1:0>
CRYSTAL
OUT Pin
Active
Not
Used
Auto Ramp Rate Speed
Control <1:0>
Amplitude Scale Factor Register <13:8>
Not Used<1:0>
Amplitude Ramp Rate Register <7:0>
Frequency Tuning Word No. 0 <7:0>
Frequency Tuning Word No. 0 <15:8>
Frequency Tuning Word No. 0 <23:16>
Frequency Tuning Word No. 0 <31:24>
Phase Offset Word No. 0 <7:0>
Phase Offset Word No. 0 <13:8>
Default
Value
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
Rev. 0 | Page 14 of 28
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