ADL5357 データシートの表示（PDF） - Analog Devices

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ADL5357

500 MHz to 1700 MHz Balanced Mixer, LO Buffer, IF Amplifier, and RF Balun

Analog Devices 

LO SUBSYSTEM

The LO amplifier is designed to provide a large signal level to

the mixer to obtain optimum intermodulation performance.

The resulting amplifier provides extremely high performance

centered on an operating frequency of 1100 MHz. The best

operation is achieved with either high-side LO injection for RF

signals in the 500 MHz to 1200 MHz range or high-side injection

for RF signals in the 900 MHz to 1700 MHz range. Operation

outside these ranges is permissible, and conversion gain is

extremely wideband, easily spanning 500 MHz to 1700 MHz,

but intermodulation is optimal over the aforementioned ranges.

The ADL5357 has two LO inputs permitting multiple synthesizers

to be rapidly switched with extremely short switching times

(<40 ns) for frequency agile applications. The two inputs are

applied to a high isolation SPDT switch that provides a constant

input impedance, regardless of whether the port is selected, to

avoid pulling the LO sources. This multiple section switch also

ensures high isolation to the off input, minimizing any leakage

from the unwanted LO input that may result in undesired IF

responses.

The single-ended LO input is converted to a fixed amplitude

differential signal using a multistage, limiting LO amplifier.

This results in consistent performance over a range of LO input

power. Optimum performance is achieved from −6 dBm to

+10 dBm, but the circuit continues to function at considerably

lower levels of LO input power.

ADL5357

The performance of this amplifier is critical in achieving a

high intercept passive mixer without degrading the noise floor

of the system. This is a critical requirement in an interferer rich

environment, such as cellular infrastructure, where blocking

interferers can limit mixer performance. The bandwidth of the

intermodulation performance is somewhat influenced by the

current in the LO amplifier chain. For dc current sensitive

applications, it is permissible to reduce the current in the

LO amplifier by raising the value of the external bias control

resistor. For dc current critical applications, the LO chain

can operate with a supply voltage as low as 3.3 V, resulting in

substantial dc power savings.

In addition, when operating with supply voltages below 3.6 V,

the ADL5357 has a power-down mode that permits the dc

current to drop to <200 μA.

All of the logic inputs are designed to work with any logic family

that provides a Logic 0 input level of less than 0.4 V and a Logic 1

input level that exceeds 1.4 V. All logic inputs are high impedance

up to Logic 1 levels of 3.3 V. At levels exceeding 3.3 V, protection

circuitry permits operation up to 5.5 V, although a small bias

current is drawn.

All pins, including the RF pins, are ESD protected and have

been tested up to a level of 1500 V HBM and 500 V CDM.

Rev. 0 | Page 17 of 24

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