ADT7463 データシートの表示（PDF） - ON Semiconductor

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ADT7463

dBCOOL™ Remote Thermal Controller and Voltage Monitor

ON Semiconductor 

The ADT7463 includes an SMBus timeout feature. If there is

no SMBus activity for 35 ms, the ADT7463 assumes that the bus

is locked and releases the bus. This prevents the device from

locking or holding the SMBus expecting data. Some SMBus

controllers cannot handle the SMBus timeout feature, so it

can be disabled.

VCOOLNTFAIGGUERMAETAIOSUNRREEMGEISNTTEIRNP1 U– TRSegister 0x40

T<h6e>ATDOTD7I4S63=h0a;sSfMouBr uesxtTerimnaelovuotltEaNgeAmBeLaEsuDre(mDeenfatuclht)annels.

I<t 6c>anTaOlsDo mISea=su1r;eSiMts BowusnTsuimppeolyuvt oDltIaSgAe,BVLCCECCD.

–12–PsTtVTIhutihOnehpcesepaVLlVn2ATiCCe0CCCDaCAsCCltspGaToosniE7un2dm4p3(M6tpePha3laEireysnehuApva4drorSse)eolU.tdfciaotSeiRsgcuseeaEsorttotwMmeeirndxneEctgateosNosrBurnueTpmiartpvelIe7olmNyvalosotPevaulfnoUtgraCtleitTgnaioVegsSgnCCmec5fC,CaigePVrPVaur(,Cisr0eu1Cad.r2VtieoomVtuno,etRa3ntntheVdgrcoiRhi2sunatE.epgn5VrhunVt1e.)l.Cs.

(PRinegs.200xt4o0)23alalorwe sdead5icVatesudptpolymteoaspuorwinegr 5thVe ,A1D2TV7,4a6n3da2n.d5 Vbe

msuepapsulireesdanwdiththoeutproovceersrasonrgicnogrethveolVtaCCgCCemVeCaCsPu(r0emVetnot 3chVaninnpeul.t).

TThhee2V.5CCVsiunpppultycvaonltbaegeumseedatsourmemoneintotrisaccahrirpiesedt osuutppthlyrovuoglthage

itnhecoVmCpCupteinr s(yPsitnem4)s.. Setting Bit 7 of Configuration Register 1

(Reg. 0x40) allows a 5 V supply to power the ADT7463 and be

AmNeAasLuOreGd-wTiOth-oDuItGoIvTerAraLnCgiOngNtVhEe RVTCCEmR e(aAsDurCem) ent channel.

ATlhl ean2a.l5ogViinnppuutts caarne mbeuultsipedlextoedmionntoitothreaocnh-icphsiept,ssuupcpcleyssviovletage

aipnpcroomxipmuatteior ns,ysAteDmCs.. This has a resolution of 10 bits. The basic

input range is 0 V to 2.25 V, but the inputs have built-in attenu-

aAtoNrAs tLoOaGllo-TwOm-eDaIsGurIeTmAeLntCoOf N2.V5EVR, T3E.3RV(,A5DVC, 1)2 V, and the

pArollcaenssaolrogcoirnepvuotlstaagreeVmCCuCCPlPtiwpiltehxoeudt ianntyoetxhteeronnal-cchoimp,psouncecnetsss.ivTeo

aalplopwrofxoimr tahteiotno,leArDanCce. Tofhitshehsaes saurpepsolyluvtoioltnagoefs1, 0thbeitAs.DTCheprboa-sic

dinupcuest arannoguetipsu0t Vof t3o/42.f2u5ll Vsc,ableut(dtheeciimnpalu7ts6h8aovre3b0u0ilth-einx)aftoternu-

tahteornsotmo ianlalol winpmuetavsuolrteamgeenatnodfs2o.5haVs,a3d.e3qVu,at5eVh,e1a2drVo,oamndtothe

cporpoecewssiothr coovreervvoollttaaggeeVs.CCP without any external components. To

allow for the tolerance of these supply voltages, the ADC pro-

IdNuPceUsTanCoIRutCpUutITofR3Y/4 full scale (decimal 768 or 300 hex) for

Tthhee ninotmerinnaallsitnrupcuttuvreolftoargtehaenadnaslooghainspaudtesqisuashteowhenaidnroFoigmurteo13.

Ecoacphe iwnipthutocviercrvuoitltcaogness.ists of an input protection diode, an

attenuator, plus a capacitor to form a first-order, low-pass filter

tIhNaPt gUivTesCtIhReCinUpIuTtRimY munity to high frequency noise.

The internal structure for the analog inputs is shown in Figure 13.

VEOacLhTiAnpGuEt cMirEcuAitScUoRnEsiMstsEoNf TanRiEnpGuItSpTrEotReSction diode, an

Ratetge.n0uxa2to0r,2.p5luVs aRceaapdaicnigto=r t0oxf0o0rmDeafafiurlstt-order, low-pass filter

Rtheagt. g0ixv2e1s tVhCeCCCiPnPpRuetaidminmgu=nit0yxt0o0hDigehfafureltquency noise.

RVeOg.L0TxA2G2 EVCCMCCERAeSaUdiRnEgM=E0Nx0T0RDEeGfaIuSltTERS

RReegg..00xx223052.V5 RVeRaedaindgin=g 0=x000x0D0eDfaeuflatult

RReegg.. 00xx2241 1V2CVCPRReeaaddiningg==00xx0000DDeefafauultlt

Reg. 0x22 VCC Reading = 0x00 Default

Reg. 0x23 5 V Reading = 0x00 Default

Reg. 0x24 12 V Reading = 0x00 Default

ADT7463

VOLTAGE MEASUREMENT LIMIT REGISTERS

ADT7463 Associated with each voltage measurement channel are high and

low limit registers. Exceeding the programmed high or low limit

causes the appropriate status bit to be set. Exceeding either limit

cVaOn LalTsoAGgeEneMraEteASSMUBRAELMEERNTTinLtIeMrrIuTptRs.EGISTERS

RAloeswgs.olc0imixa4itte4dr2ewg.5iisttVhereLsa.ocEwhxvcLoeilemtdaiignteg=mt0hexea0spu0rroDegmerafeamnutmltcehdanhnigehl

are

or

high and

low limit

Rcaeug.se0sxt4h5e2a.p5pVroHpriigathe Lstiamtuist =bit0txoFbFeDseetf.auElxtceeding either limit

Rcaeng.a0lsxo46geVnCCeCrCaPPteLSowMBLAimLiEtR=T0ixn0t0erDruepfatsu.lt

RReegg..00xx4474V2.CC5CCPVP HLiogwh LLiimmiitt == 00xx0F0FDDeeffaauulltt

RReegg..00xx4485V2.CC5CCVLoHwigLhimLiimt =it0=x000xFDFefDauefltault

RReegg..00xx4496VVCCCCCCPHLigohwLLimimitit==00xxF0F0 DDeeffaauulltt

RReegg..00xx44A7 5VCVCLP oHwigLhimLiimt =it0=x000xFDFefDauefltault

RReegg..00xx44B8 5VCVCHLiogwh LLiimmiitt == 00xx0F0FDDeeffaauulltt

RReegg..00xx44C9 V12CCVHLiogwh LLiimmiitt == 00xx0F0FDDeeffaauultlt

RReegg..00xx44DA 152VVLHowighLiLmimiti=t =0x00x0FDF eDfaeufaltult

Reg. 0x4B 5 V High Limit = 0xFF Default

Reg.

0x4C111222VVIINNV

Low

112200kk��

Limit

=

0x00

Default

2200kk��

3300ppFF

Reg. 0x4D 12 V High Limit = 0xFF Default

1552VVVIININN

919323k0k�k��

442770kkk���

333000pppFFF

33..335VVVIININN

669883kkk���

774117kkk���

333000pppFFF

MMUUXX

223..5.53VVVIININN

446558kkk���

997441kkk���

333000pppFFF

MUX

2VV.C5CVCCPIPN

11774..555kkk���

5522.9.554kkk���

333550pppFFF

17.5k�

FVCigCPure 13. Str5u2.c5kt�ure of Ana3l5opgF Inputs

Table II shows the input ranges of the analog inputs and output

codes of the 10-bit ADC.

When the ADFiCguisreru1n3n.iSngtr,uitctsuamrepolefsAannadlocognIvneprtustas voltage

aiTcnompadubeetlaseisnouIIfr7est1hmh1eoeµw1ns0sta-tonbhndieteaiAnavDcpehruCatig.nreapsnu1gt6etsacokoenf svthenreosiamonnianslaotloglyrine1dp1uu.3cts8e anmnosdi.seo;utput

When the ADC is running, it samples and converts a voltage

input in 711 µs and averages 16 conversions to reduce noise;

a measurement on each input takes nominally 11.38 ms.

REV. C

Rev. 4 | Page 13 of 52 | www.onsemi.com

–13–

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