AK8858 データシートの表示（PDF） - Asahi Kasei Microdevices

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AK8858

PS/SD Multi Format Video Decoder

Asahi Kasei Microdevices 

[5.3] Output data timing

[AK8858]

DTCLK(*1)

tDS

tDH

0.5PVDD1

Output Data(*2)

0.5PVDD1

Parameter

Symbol Min Typ Max Units

20

Condition

(Interlace) 16bit YCbCr output

(Interlace) RGB output

Output Data Setup Time

tDS

10

nsec

(Interlace) 8bit YCbCr output

(Progressive) 16bit YCbCr output

(Progressive) RGB output

5

(Progressive) 8bit YCbCr output

Output Data Hold Time

20

tDH

10

nsec

(Interlace) 16bit YCbCr output

(Interlace) RGB output

(Interlace) 8bit YCbCr output

(Progressive) 16bit YCbCr output

(Progressive) RGB output

5

(Progressive) 8bit YCbCr output

(*1) It is possible to invert the polarity of DTCLK by setting register. (Sub Address: 0x07[7]).

(*2)Output Data is general term of DATA [23:0], HD, VD_FLD and DVAL_FLD.

[5.4] Reset pulse

RSTN

Parameter

RSTN pulse width

RSTN pulse eject

tRST/ tRJCT

Symbol

tRST

tRJCT

Min

Typ

Max

500

50

Units

nsec

MS1230-E-00

- 16 -

2010/9

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