AM186ED データシートの表示（PDF） - Advanced Micro Devices

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AM186ED

High Performance, 80C186- and 80C188-Compatible, 16-Bit Embedded Microcontrollers

Advanced Micro Devices 

PRELIMINARY

INTERRUPT ACKNOWLEDGE CYCLE WAVEFORMS

t1

t2

t3

t4

tW

CLKOUTA

68

A19–A0

Address

7

8

S6

S6

Invalid

S6

AD15–AD0

12

1

2 (b)

Ptr

15

23

ALE

BHE

F INTA1–INTA0

DEN

A DT/R

S2–S0

9

10

11

BHE

20

22

19 (c)

3

Status

22

4 (a)

R Notes:

Da The status bits become inactive in the state preceding t4.

T

4

31

21

22 (d)

b The data hold time lasts only until the interrupt acknowledge signal deasserts, even if the interrupt acknowledge

transition occurs prior to tCLDX (min).

c This parameter applies for an interrupt acknowledge cycle that follows a write cycle.

d If followed by a write cycle, this change occurs in the state preceding that write cycle.

76

Am186ED/EDLV Microcontrollers

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