IS61SF51218D(2002) データシートの表示（PDF） - Integrated Silicon Solution

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IS61SF51218D
(Rev.:2002)

256K x 32, 256K x 36, 512K x 18 SYNCHRONOUS FLOW-THROUGH STATIC RAM

Integrated Silicon Solution 

IS61SF25632T/D IS61LF25632T/D

IS61SF25636T/D IS61LF25636T/D

IS61SF51218T/D IS61LF51218T/D

CAPACITANCE(1,2)

Symbol

CIN

COUT

Parameter

Input Capacitance

Input/Output Capacitance

Conditions

VIN = 0V

VOUT = 0V

Max.

Unit

6

pF

8

pF

Notes:

1. Tested initially and after any design or process changes that may affect these parameters.

2. Test conditions: TA = 25°C, f = 1 MHz, Vcc = 3.3V.

ISSI ®

AC TEST CONDITIONS

Parameter

Input Pulse Level

Input Rise and Fall Times

Input and Output Timing

and Reference Level

Output Load

Unit

0V to 3.0V

1.5 ns

1.5V for 3.3V I/O

VCCQ/2 for 2.5V I/O

See Figures 1 and 2

AC TEST LOADS

ZO = 50Ω

Output

Buffer

50Ω

1.5V for 3.3V I/O

VCCQ for 2.5V I/O

Figure 1

3.3V for 3.3V I/O

2.5V for 2.5V I/O

OUTPUT

5 pF

Including

jig and

scope

317Ω/

1667Ω

351Ω/

1538Ω

Figure 2

12

Integrated Silicon Solution, Inc. — 1-800-379-4774

Rev. A

02/01/02

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