AN5195K-C データシートの表示（PDF） - Panasonic Corporation

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AN5195K-C

Single chip IC for PAL/NTSC color TV (built-in I2C bus interface)

Panasonic Corporation 

ICs for TV

AN5195K-C

s Terminal Equivalent Circuits (continued)

Pin No.

Equivalent circuit

Description

DC (V)

18

6.3 V

(VCC2)

To

chroma

circuit

5V

(VCC3)

Horizontal sync. detection pin:

DC

• Phase of horizontal synchronizing at synchronous

signal and horizontal output pulse is approx. 6 V

10 kΩ

800 µA 12 kΩ

I1

2.8 V

12 kΩ

detected and outputted.

at asynchronous

• Pin 18 is low at out of phase.

approx. 0.3 V

• In asynchronous state, color control

becomes min. and chroma output

800 µA

I2

disappears.

• Pay attention to impedance when

50 µA

18 ZO

voltage of pin18 is used by micro-

computer (ZO ≥ 500 kΩ is required)

Pin 56

H-out

1 MΩ

0.022 µF 10 kΩ

19



Pin 46

HV sync. in

• HVSYNC period

When pin 56 is high: I1 on

When pin 56 is low: I2 on

GND:



• RGB circuit

• DAC I2C circuit

20

5.9 V

60 kΩ

60 kΩ

6.9 kΩ

9V

(VCC1)

To contrast

circuit

2.1 V

ACL pin:

• Contrast can be reduced when DC

voltage of pin 20 is decreased from

the outside.

• Service SW

DC

approx. 3 V

2.3 V

Contrast

control

7.1 kΩ

6.9

kΩ

7.1 kΩ

6.9 kΩ

20

2.3 V

±1 V

100 µA

100 µA

100 µA

3.5 V

4.7 µF

Note) When pin 20 is used as ACL, set

design must be done not to become

V20 < 0.9 V so that pin 20 operates

also as the service SW.

21

I2C bus data input pin:

5V

(VCC3)

100 kΩ

50 µA 100 kΩ

Data 1 kΩ

From

21

microcomputer

1.7 V

ACK

30 kΩ

To logic

circuit

30 kΩ

AC

(pulse)

17

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