AN8049 データシートの表示（PDF） - Panasonic Corporation

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AN8049

1.8-volt 3-channel step-up, step-down, and polarity inverting DC-DC converter control IC

Panasonic Corporation 

AN8049SH

Voltage Regulators

I Application Notes (continued)

[4] Function descriptions (continued)

9. Output 1 and output 2 blocks

These output circuits have a totem pole structure. A constant-current source output with good line regulation

can be set up freely by connecting current setting resistors to the RB pins (pins 10 and 11).

See the "[2] Main characteristics" section earlier in this document for details on the RB vs. ISO(OUT) and RB vs.

ISI(OUT) characteristics.

10. Output 3 block

This output circuit has an open collector structure.

An output current of up to 50 mA can be provided, and the output pin has a breakdown voltage of 14.2 V.

11. CTL block

This block controls the on/off state of each channel. See the "[9] Sequential operation" section later in this

document.

[5] Time constant setup for the timer latch short-circuit protection circuit

Figure 6 shows the structure of the timer latch short-circuit protection circuit. The short-circuit protection

comparator continuously compares a 0.9 V reference voltage with the FB1, FB2, and FB3 error amplifier outputs.

When the DC-DC converter output load conditions are stable, the short-circuit protection comparator holds its

average value since there are no fluctuations in the error amplifier outputs. At this time, the output transistor Q1 will

be in the conducting state, and the S.C.P. pin will be held at 0 V.

If the output load conditions change rapidly and a high-level signal (0.9 V or higher) is input to the short-circuit

protection comparator from the error amplifier output, the short-circuit protection comparator will output a low level

and the output transistor Q1 will shut off. Then, the capacitor CSCP connected to the S.C.P. pin will start to charge.

When the external capacitor CSCP is charged to about 1.26 V by the constant current of about 1.1 mA, the latch circuit

will latch and the dead-time will be set to 100% with the output held fixed at the low level. Once the latch circuit has

latched, the S.C.P. pin capacitor will be discharged to about 0 V, but the latch circuit will not reset unless either power

is turned off or the power supply is re-started by on/off control.

1.26 V = ICHG ×

tPE

CSCP

∴ tPE (s) = 1.15 × CSCP (µF)

VSCP (V)

1.26 Short-circuit detection time tPE

At power supply startup, the output appears to be in the shorted

state, and the IC starts to charge the S.C.P. pin capacitor. Therefore,

users must select an external capacitor that allows the DC-DC con-

verter output voltage to rise before the latch circuit in the later stage

latches. In particular, care is required if the soft start function is

used, since that function makes the startup time longer.

0.06

t (s)

Figure 5. S.C.P. pin charging waveform

24

FB1

22

FB2

20

FB3

On/off control

VCC

S.C.P. comp. Q1

0.9 V

Internal reference voltage

U.V.L.O.

1.1 µA

Latch

R

S

Q

High level detection comparator

VREF

Output shutoff

S.C.P.

Figure 6. Short-circuit protection circuit

18

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