AP2171FM データシートの表示（PDF） - Diodes Incorporated.
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AP2171FM Datasheet PDF : 18 Pages
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AP2161/ AP2171
Electrical Characteristics (@TA = +25°C, VIN = +5V, unless otherwise specified.)
Symbol
VUVLO
ISHDN
IQ
ILEAK
IREV
Parameter
Input UVLO
Input Shutdown Current
Input Quiescent Current
Input Leakage Current
Reverse Leakage Current
RDS(ON) Switch on-resistance
ISHORT Short-Circuit Current Limit
ILIMIT Over-Load Current Limit
ITrig Current limiting trigger threshold
ISINK EN Input leakage
tD(ON) Output turn-on delay time
tR
Output turn-on rise time
tD(OFF) Output turn-off delay time
tF
Output turn-off fall time
Fault Flag
RFLG FLG output FET on-resistance
tBlank FLG blanking time
Over-Temperature Protection
TSHDN Thermal Shutdown Threshold
THYS Thermal Shutdown Hysteresis
θJA
Thermal Resistance Junction-to-
Ambient
RLOAD = 1kΩ
Test Conditions
Disabled, IOUT = 0
Enabled, IOUT = 0
Disabled, OUT grounded
Disabled, VIN = 0V, VOUT = 5V, IREV at VIN
VIN = 5V,
IOUT = 1A
SOT25, MSOP-8EP, SO-8
TA = +25°C U-DFN2018-6
-40°C ≤ TA ≤ +85°C
VIN = 3.3V,
IOUT = 1A
TA = +25°C
-40°C ≤ TA ≤ +85°C
Enabled into short circuit, CL = 68µF
VIN = 5V, VOUT = 4.6V, CL = 68µF, -40°C ≤ TA ≤ +85°C
Output Current Slew rate (<100A/s) , CL=68µF
VEN = 5V
CL = 1µF, RLOAD = 10Ω
CL = 1µF, RLOAD = 10Ω
CL = 1µF, RLOAD = 10Ω
CL = 1µF, RLOAD = 10Ω
IFLG = 10mA
CIN = 10µF, CL = 68µF
Enabled, RLOAD = 1kΩ
SO-8 (Note 5)
MSOP-8EP (Note 6)
SOT25 (Note 7)
U-DFN2018-6 (Note 8)
Min Typ Max Unit
1.6 1.9 2.5
V
0.5
1
A
45
70
µA
1
µA
1
µA
95 115
90 110
140 mΩ
120 140
170
1.2
A
1.1 1.5 1.9
A
2.0
A
1
µA
0.05
ms
0.6 1.5 ms
0.01
ms
0.05 0.1 ms
20
40
Ω
4
7
15 ms
140
C
25
C
110
°C/W
60
°C/W
157
°C/W
70
°C/W
Notes:
5. Test condition for SO-8: Device mounted on FR-4, 2oz copper, with minimum recommended pad layout.
6. Test condition for MSOP-8EP: Device mounted on 2” x 2” FR-4 substrate PC board, 2oz copper, with minimum recommended pad on top layer and
thermal vias to bottom layer ground plane.
7. Test condition for SOT25: Device mounted on FR-4, 2oz copper, with minimum recommended pad layout.
8. Test condition for U-DFN2018-6: Device mounted on FR-4 2-layer board, 2oz copper, with minimum recommended pad on top layer and 3 vias to bottom
layer 1.0”x1.4” ground plane.
AP2161/ AP2171
Document number: DS31564 Rev. 7 - 2
4 of 18
www.diodes.com
March 2013
© Diodes Incorporated
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