HT1608L
Pad No. Pad Name I/O
Description
33
CLK2
I
Shift signal for channel 1 on the falling edge and used for channel 2
when MODE is set to VSS (Note 1)
34
VSS
— Power supply (ground)
35
DL1
I/O Data input/output of channel 1 shift register
36
DR1
I/O Data input/output of channel 1 shift register
37
DL2
I/O Data input/output of channel 2 shift register
38
DR2
I/O Data input/output of channel 2 shift register
39
ALT
I Alternate signal input for LCD driving waveform
40
SHF1
I Shift direction selection of channel 1 shift register (Note 2)
41
SHF2
I Shift direction selection of channel 2 shift register (Note 2)
42
MODE
I Mode select signal of channel 2 (Note 3)
43, 44
V1, V2
I LCD bias supply voltage for channels 1 and 2
45, 46
V3, V4
I LCD bias supply voltage for channel 1
47, 48
V5, V6
I LCD bias supply voltage for channel 2
49~59
Y39~Y29 O LCD driver outputs for channel 2
Note 1: Data is processed on the clock falling or rising edge as shown in the following table.
MODE= L (VSS)
MODE= H (VDD)
5
27th Aug ’98