AT89C55 データシートの表示（PDF） - Atmel Corporation

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AT89C55

8-Bit Microcontroller with 20K Bytes Flash

Atmel Corporation 

Data Polling: The AT89C55 features Data Polling to indi-

cate the end of a write cycle. During a write cycle, an

attempted read of the last byte written will result in the com-

plement of the written data on PO.7. Once the write cycle

has been completed, true data is valid on all outputs, and

the next cycle may begin. Data Polling may begin any time

after a write cycle has been initiated.

Ready/Busy: The progress of byte programming can also

be monitored by the RDY/BSY output signal. P3.4 is pulled

low after ALE goes high during programming to indicate

BUSY. P3.4 is pulled high again when programming is

done to indicate READY.

Program Verify: If lock bits LB1 and LB2 have not been

programmed, the programmed code data can be read back

via the address and data lines for verification. The lock bits

cannot be verified directly. Verification of the lock bits is

achieved by observing that their features are enabled.

Chip Erase: The entire Flash array is erased electrically

by using the proper combination of control signals and by

holding ALE/PROG low for 10 ms. The code array is written

with all 1s. The chip erase operation must be executed

before the code memory can be reprogrammed.

Reading the Signature Bytes: The signature bytes are

read by the same procedure as a normal verification of

locations 030H, 031H, and 032H, except that P3.6 and

P3.7 must be pulled to a logic low. The values returned are

as follows.

(030H) = 1EH indicates manufactured by Atmel

(031H) = 55H indicates 89C55

(032H) = FFH indicates 12V programming

(032H) = 05H indicates 5V programming

Programming Interface

Every code byte in the Flash array can be written, and the

entire array can be erased, by using the appropriate combi-

nation of control signals. The write operation cycle is self-

timed and once initiated, will automatically time itself to

completion.

All major programming vendors offer worldwide support for

the Atmel microcontroller series. Please contact your local

programming vendor for the appropriate software revision.

Figure 9. Programming the Flash Memory

AT89C55

ADDR. A0 - A7 P1

VCC

0000H/4FFFH

P2.0 - P2.5 P0

A8 - A13

A14*

P3.0

SEE FLASH

PROGRAMMING

MODES TABLE

P2.6

ALE

P2.7

P3.6

P3.7

XTAL2

EA

3-33 MHz

+5V

PGM

DATA

PROG

VI H/VPP

Figure 10. Verifying the Flash Memory

ADDR. A0 - A7

0000H/4FFFH

A8 - A13

A14*

SEE FLASH

PROGRAMMING

MODES TABLE

AT89C55

P1

VCC

P2.0 - P2.5 P0

P3.0

P2.6

ALE

P2.7

P3.6

P3.7

XTAL 2

EA

+5V

PGM DATA

(USE 10K

PULLUPS)

VI H

3-33 MHz

XTAL 1

RST

VI H

GND

PSEN

*Programming address line A14 (P3.0) is not the same as the external

memory address line A14 (P2.6)

4-182

AT89C55

XTAL 1

RST

VI H

GND

PSEN

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