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ATMEGA32U4-16AU データシートの表示(PDF) - Atmel Corporation

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ATMEGA32U4-16AU Datasheet PDF : 23 Pages
First Prev 11 12 13 14 15 16 17 18 19 20 Next Last
Address
0x1B (0x3B)
0x1A (0x3A)
0x19 (0x39)
0x18 (0x38)
0x17 (0x37)
0x16 (0x36)
0x15 (0x35)
0x14 (0x34)
0x13 (0x33)
0x12 (0x32)
0x11 (0x31)
0x10 (0x30)
0x0F (0x2F)
0x0E (0x2E)
0x0D (0x2D)
0x0C (0x2C)
0x0B (0x2B)
0x0A (0x2A)
0x09 (0x29)
0x08 (0x28)
0x07 (0x27)
0x06 (0x26)
0x05 (0x25)
0x04 (0x24)
0x03 (0x23)
0x02 (0x22)
0x01 (0x21)
0x00 (0x20)
Name
PCIFR
Reserved
TIFR4
TIFR3
TIFR2
TIFR1
TIFR0
Reserved
Reserved
Reserved
PORTF
DDRF
PINF
PORTE
DDRE
PINE
PORTD
DDRD
PIND
PORTC
DDRC
PINC
PORTB
DDRB
PINB
Reserved
Reserved
Reserved
Bit 7
-
-
OCF4D
-
-
-
-
-
-
-
PORTF7
DDF7
PINF7
-
-
-
PORTD7
DDD7
PIND7
PORTC7
DDC7
PINC7
PORTB7
DDB7
PINB7
-
-
-
Bit 6
-
-
OCF4A
-
-
-
-
-
-
-
PORTF6
DDF6
PINF6
PORTE6
DDE6
PINE6
PORTD6
DDD6
PIND6
PORTC6
DDC6
PINC6
PORTB6
DDB6
PINB6
-
-
-
Bit 5
-
-
OCF4B
ICF3
-
ICF1
-
-
-
-
PORTF5
DDF5
PINF5
-
-
-
PORTD5
DDD5
PIND5
-
-
-
PORTB5
DDB5
PINB5
-
-
-
Bit 4
-
-
-
-
-
-
-
-
-
-
PORTF4
DDF4
PINF4
-
-
-
PORTD4
DDD4
PIND4
-
-
-
PORTB4
DDB4
PINB4
-
-
-
Bit 3
-
-
-
OCF3C
-
OCF1C
-
-
-
-
-
-
-
-
-
-
PORTD3
DDD3
PIND3
-
-
-
PORTB3
DDB3
PINB3
-
-
-
Bit 2
-
-
TOV4
OCF3B
OCF2B
OCF1B
OCF0B
-
-
-
-
-
-
PORTE2
DDE2
PINE2
PORTD2
DDD2
PIND2
-
-
-
PORTB2
DDB2
PINB2
-
-
-
Bit 1
-
-
-
OCF3A
OCF2A
OCF1A
OCF0A
-
-
-
PORTF1
DDF1
PINF1
-
-
-
PORTD1
DDD1
PIND1
-
-
-
PORTB1
DDB1
PINB1
-
-
-
Bit 0
PCIF0
-
-
TOV3
TOV2
TOV1
TOV0
-
-
-
PORTF0
DDF0
PINF0
-
-
-
PORTD0
DDD0
PIND0
-
-
-
PORTB0
DDB0
PINB0
-
-
-
Page
Note: 1. For compatibility with future devices, reserved bits should be written to zero if accessed. Reserved I/O memory addresses
should never be written.
2. I/O registers within the address range $00 - $1F are directly bit-accessible using the SBI and CBI instructions. In these reg-
isters, the value of single bits can be checked by using the SBIS and SBIC instructions.
3. Some of the status flags are cleared by writing a logical one to them. Note that the CBI and SBI instructions will operate on
all bits in the I/O register, writing a one back into any flag read as set, thus clearing the flag. The CBI and SBI instructions
work with registers 0x00 to 0x1F only.
4. When using the I/O specific commands IN and OUT, the I/O addresses $00 - $3F must be used. When addressing I/O reg-
isters as data space using LD and ST instructions, $20 must be added to these addresses. The ATmega16U4/ATmega32U4
is a complex microcontroller with more peripheral units than can be supported within the 64 location reserved in Opcode for
the IN and OUT instructions. For the Extended I/O space from $60 - $1FF in SRAM, only the ST/STS/STD and LD/LDS/LDD
instructions can be used.
12 ATmega16U4/ATmega32U4
7766BS–AVR–07/08

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