ATTINY1634(2014) データシートの表示（PDF） - Atmel Corporation

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ATTINY1634
(Rev.:2014)

8-bit AVR Microcontroller with 16KB In-system Programmable Flash

Atmel Corporation 

5. CPU Core

This section discusses the AVR® core architecture in general. The main function of the CPU core is to ensure correct

program execution. The CPU must therefore be able to access memories, perform calculations, control peripherals, and

handle interrupts.

5.1 Architectural Overview

Figure 5-1. Block Diagram of the AVR Architecture

8-Bit Data Bus

Data

Memory

(SRAM)

Program

Counter

Program

Memory

(Flash)

Instruction

Register

Interrupt

Unit

Status and

Control

General

Purpose

Registers

X

Y

Z

ALU

Instruction

Decoder

Control Lines

In order to maximize performance and parallelism, the AVR uses a Harvard architecture—with separate memories and

buses for program and data. Instructions in the program memory are executed with single-level pipelining. While one

instruction is being executed, the next instruction is pre-fetched from the program memory. This concept enables instructions

to be executed in every clock cycle. The program memory is an in-system reprogrammable Flash memory.

The fast-access register file contains 32 x 8-bit general purpose working registers with a single clock cycle access time. This

allows single-cycle arithmetic logic unit (ALU) operation. In a typical ALU operation, two operands are output from the

register file, the operation is executed and the result is stored back in the register file—in one clock cycle.

Six of the 32 registers can be used as three 16-bit indirect address register pointers for data space addressing—enabling

efficient address calculations. One of these address pointers can also be used as an address pointer for lookup tables in

Flash program memory. These added function registers are the 16-bit X, Y, and Z register described later in this section.

The ALU supports arithmetic and logic operations between registers or between a constant and a register. Single register

operations can also be executed in the ALU. After an arithmetic operation, the status register is updated to reflect

information about the result of the operation.

Program flow is provided by conditional and unconditional jump and call instructions capable of directly addressing the whole

address space. Most AVR instructions have a single 16-bit word format, but 32-bit-wide instructions also exist. The actual

instruction set varies because some devices only implement part of the instruction set.

8

ATtiny1634 [PRELIMINARY DATASHEET]

9296C–AVR–07/14

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