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TC820CKW データシートの表示(PDF) - TelCom Semiconductor Inc => Microchip

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TC820CKW
TelCom-Semiconductor
TelCom Semiconductor Inc => Microchip TelCom-Semiconductor
TC820CKW Datasheet PDF : 22 Pages
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TC820
3-3/4 A/D CONVERTER WITH
FREQUENCY COUNTER
AND LOGIC PROBE
+9V
1M
LOGIC
PROBE
INPUT
1M
R1
VH
+
R2
VL +
R3
1N4148
1N4148
VDD
LOGIC
DP1/HI
TC820
DP0/LO
+9V
10k
TL061
VIN
1N4148
0.01µF
OFFSET
NULL
VDD
PK HOLD
VI+N TC820
VSS
DGND
0V
NOTE: Select R1, R2, R3 for desired logic thresholds.
Figure 22. Window Comparator Logic Probe
Figure 23. External Peak Detector
acitors added across the input pull-down resistors to stretch
the input pulse and permit viewing short-duration input
pulses.
depending on the displays values. Figure 25 shows a set of
waveforms for the a, g, d outputs of one digit for several
combinations of "on" segments.
External Peak Detection
The TC820 will hold the highest A/D conversion or
frequency reading indefinitely when the PK HOLD input is
connected to VDD. However, the analog peak input must be
present during the A/D converter's signal integrate period.
For slowly changing signals, such as temperature, the peak
reading will be properly converted and held.
If rapidly changing analog signals must be held, an
external peak detector should be added. An inexpensive
circuit can be made from an op amp and a few discrete
components, as shown in Figure 23. The droop rate of the
external peak detector should be adjusted so that the held
voltage will not decay below the desired accuracy level
during the converter's 400msec conversion time.
Liquid Crystal Display (LCD)
The TC820 drives a triplex (multiplexed 3:1) LCD with
three backplanes. The LCD can include decimal points,
polarity sign, and annunciators for overrange, peak hold,
high and low logic levels, and low battery. Table IV shows the
assignment of the display segments to the backplanes and
segment drive lines. The backplane drive frequency is
obtained by dividing the oscillator frequency by 240.
Backplane waveforms are shown in Figure 24. These
appear on outputs BP1, BP2, and BP3. They remain the
same regardless of the segments being driven.
Other display output lines have waveforms that vary
Table IV. LCD Backplane and Segment Assignments
44-Pin LCD
40-Pin DIP Flat Pkg Display
Pin No. Pin No. Pin No.
BP1 BP2 BP3
1
40
3
LOW "—"
2
41
4
A4 G4
3
42
5
B4 C4
4
43
6
HIGH F3
5
44
7
A3 G3
6
1
8
B3 C3
7
2
9
OVER F2
8
3
10
A2 G2
9
4
11
B2 C2
10
5
12
PEAK F1
11
6
13
A1 G1
12
7
14
B1 C1
13
8
2,16*
14
9
1
— BP2
15
10
15
BP1 —
*Connect both pins 2 and 16 of LCD to TC820 BP3 output.
E4
D4
DP3
E3
D3
DP2
E2
D2
DP1
E1
D1
BATT
BP3
3-168
TELCOM SEMICONDUCTOR, INC.

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