BST122 データシートの表示（PDF） - Philips Electronics

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BST122

P-channel enhancement mode vertical D-MOS transistor

Philips Electronics 

Philips Semiconductors

P-channel enhancement mode vertical

D-MOS transistor

Product specification

BST122

DESCRIPTION

P-channel vertical D-MOS transistor

in SOT89 envelope and intended for

use in relay, high-speed and

line-transformer drivers, using

SMD-technology.

FEATURES

• Very low RDS(on)

• Direct interface to C-MOS, TTL

• High-speed switching

• No second breakdown

QUICK REFERENCE DATA

Drain-source voltage

Gate-source voltage (open drain)

Drain current (DC)

Total power dissipation up to Tamb = 25 °C

Drain-source ON-resistance

−ID = 200 mA; −VGS = 10 V

Transfer admittance

−ID = 200 mA; −VDS = 15 V

PINNING - SOT89

1 = source

2 = drain

3 = gate

−VDS

±VGSO

−ID

Ptot

max.

max.

max.

max.

60 V

20 V

0,25 A

1W

RDS(on)

max.

typ.

10 Ω

7.5 Ω

 Yfs typ. 125 mS

PIN CONFIGURATION

Marking: LN

handbook, halfpage

d

g

1

2

3

s

Bottom view

MAM354

Fig.1 Simplified outline and symbol.

April 1995

2

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