SY89809LTCTR(2005) データシートの表示（PDF） - Micrel

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SY89809LTCTR
(Rev.:2005)

3.3V 1:9 HIGH-PERFORMANCE, LOW-VOLTAGE BUS CLOCK DRIVER

Micrel 

Micrel, Inc.

AC ELECTRICAL CHARACTERISTICS(4)

Precision Edge®

SY89809L

Symbol

Parameter

TA = 0°C

Min. Typ. Max.

TA = +25°C

Min. Typ. Max.

TA = +85°C

Min. Typ. Max. Unit

tPHL

tPLH

fMAX

tSKEW

tSKPP

VPP

Propagation Delay(5)

Maximum Operating Freq.(6)

Within-Device Skew(7)

Part-to-Part Skew(8)

Minimum Input Swing(9)

LVPECL_CLK

—

1.0

—

—

1.0

—

—

1.0

—

ns

500

—

—

500

—

—

500

—

— MHz

—

—

50

—

—

50

—

—

50

ps

—

—

200

—

—

200

—

—

200 ps

600

—

—

600

—

—

600

—

— mV

VCMR

Common Mode Range(10)

LVPECL_CLK

–1.5 — –0.4 –1.5 — –0.4 –1.5 — –0.4 V

tS

OE Set-Up Time(11)

tH

OE Hold Time

tr

Output Rise/Fall Time

tf

(20% – 80%)

1.0

—

—

1.0

—

—

1.0

—

—

ns

0.5

—

—

0.5

—

—

0.5

—

—

ns

300

—

650 300

—

650 300

—

650 ps

Notes:

4. Outputs loaded with 50Ω to ground. Airflow ≥ 300lfpm.

5. Differential propagation delay is defined as the delay from the crossing point of the differential input signals to the crossing point of the differential

output signals.

6. Output swing greater than 450mV.

7. The within-device skew is defined as the worst case difference between any two similar delay paths within a single device operating at the same

voltage and temperature.

8. The part-to-part skew is defined as the absolute worst case difference between any two delay paths on any two devices operating at the same

voltage and temperature.

9. The VPP(min.) is defined as the minimum input differential voltage which will cause no increase in the propagation delay.

10. VCMR is defined as the range within which the VIH level may vary, with the device still meeting the propagation delay specification. The numbers in

the table are referenced to VCCI. The VIL level must be such that the peak-to-peak voltage is less than 1.0V and greater than or equal to VPP(min.).

The lower end of the CMR range varies 1:1 with VCCI. The VCMR(min) will be fixed at 3.3V – |VCMR(min)|.

11. OE set-up time is defined with respect to the rising edge of the clock. OE HIGH-to-LOW transition ensures outputs remain disabled during the next

clock cycle. OE LOW-to-HIGH transition enables normal operation of the next input clock.

M9999-092005

hbwhelp@micrel.com or (408) 955-1690

5

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