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C167CR-16RM データシートの表示(PDF) - Infineon Technologies

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C167CR-16RM
Infineon
Infineon Technologies Infineon
C167CR-16RM Datasheet PDF : 89 Pages
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C167CR
C167SR
General Device Information
Table 2
Pin Definitions and Functions P-MQFP-144-8 (cont’d)
Symbol Pin
No.
Input Function
Outp.
P3
P3.0 65
P3.1 66
P3.2 67
P3.3 68
P3.4 69
P3.5 70
P3.6 73
P3.7 74
P3.8 75
P3.9 76
P3.10 77
P3.11 78
P3.12 79
P3.13 80
P3.15 81
IO Port 3 is a 15-bit bidirectional I/O port. It is bit-wise
programmable for input or output via direction bits. For a pin
configured as input, the output driver is put into high-
impedance state. Port 3 outputs can be configured as
push/pull or open drain drivers. The input threshold of Port 3
is selectable (TTL or special).
The following Port 3 pins also serve for alternate functions:
I
T0IN
CAPCOM1 Timer T0 Count Input
O T6OUT GPT2 Timer T6 Toggle Latch Output
I
CAPIN GPT2 Register CAPREL Capture Input
O T3OUT GPT1 Timer T3 Toggle Latch Output
I
T3EUD GPT1 Timer T3 External Up/Down Control Input
I
T4IN
GPT1 Timer T4 Count/Gate/Reload/Capture Inp.
I
T3IN
GPT1 Timer T3 Count/Gate Input
I
T2IN
GPT1 Timer T2 Count/Gate/Reload/Capture Inp.
I/O MRST SSC Master-Receive/Slave-Transmit Inp./Outp.
I/O MTSR SSC Master-Transmit/Slave-Receive Outp./Inp.
O TxD0
ASC0 Clock/Data Output (Async./Sync.)
I/O RxD0
ASC0 Data Input (Async.) or Inp./Outp. (Sync.)
O BHE
External Memory High Byte Enable Signal,
O WRH
External Memory High Byte Write Strobe
I/O SCLK
SSC Master Clock Output / Slave Clock Input.
O CLKOUT System Clock Output (= CPU Clock)
OWE 84
I
(VPP)
Oscillator Watchdog Enable. This input enables the oscillator
watchdog when high or disables it when low e.g. for testing
purposes. An internal pull-up device holds this input high if
nothing is driving it.
For normal operation pin OWE should be high or not
connected.
In order to drive pin OWE low draw a current of at least
200 µA.
Data Sheet
12
V3.3, 2005-02

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