C8051F385 データシートの表示（PDF） - Silicon Laboratories

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C8051F385

Full Speed USB Flash MCU Family

Silicon Laboratories 

C8051F380/1/2/3/4/5/6/7/C

SFR Definition 19.2. OSCICL: Internal H-F Oscillator Calibration .............................. 145

SFR Definition 19.3. OSCICN: Internal H-F Oscillator Control ................................... 146

SFR Definition 19.4. CLKMUL: Clock Multiplier Control ............................................. 147

SFR Definition 19.5. OSCLCN: Internal L-F Oscillator Control ................................... 148

SFR Definition 19.6. OSCXCN: External Oscillator Control ........................................ 152

SFR Definition 20.1. XBR0: Port I/O Crossbar Register 0 .......................................... 159

SFR Definition 20.2. XBR1: Port I/O Crossbar Register 1 .......................................... 160

SFR Definition 20.3. XBR2: Port I/O Crossbar Register 2 .......................................... 161

SFR Definition 20.4. P0: Port 0 ................................................................................... 162

SFR Definition 20.5. P0MDIN: Port 0 Input Mode ....................................................... 162

SFR Definition 20.6. P0MDOUT: Port 0 Output Mode ................................................ 163

SFR Definition 20.7. P0SKIP: Port 0 Skip ................................................................... 163

SFR Definition 20.8. P1: Port 1 ................................................................................... 164

SFR Definition 20.9. P1MDIN: Port 1 Input Mode ....................................................... 164

SFR Definition 20.10. P1MDOUT: Port 1 Output Mode .............................................. 165

SFR Definition 20.11. P1SKIP: Port 1 Skip ................................................................. 165

SFR Definition 20.12. P2: Port 2 ................................................................................. 166

SFR Definition 20.13. P2MDIN: Port 2 Input Mode ..................................................... 166

SFR Definition 20.14. P2MDOUT: Port 2 Output Mode .............................................. 167

SFR Definition 20.15. P2SKIP: Port 2 Skip ................................................................. 167

SFR Definition 20.16. P3: Port 3 ................................................................................. 168

SFR Definition 20.17. P3MDIN: Port 3 Input Mode ..................................................... 168

SFR Definition 20.18. P3MDOUT: Port 3 Output Mode .............................................. 169

SFR Definition 20.19. P3SKIP: Port 3 Skip ................................................................. 169

SFR Definition 20.20. P4: Port 4 ................................................................................. 170

SFR Definition 20.21. P4MDIN: Port 4 Input Mode ..................................................... 170

SFR Definition 20.22. P4MDOUT: Port 4 Output Mode .............................................. 171

SFR Definition 21.1. USB0XCN: USB0 Transceiver Control ...................................... 174

SFR Definition 21.2. USB0ADR: USB0 Indirect Address ........................................... 176

SFR Definition 21.3. USB0DAT: USB0 Data .............................................................. 177

USB Register Definition 21.4. INDEX: USB0 Endpoint Index ..................................... 179

USB Register Definition 21.5. CLKREC: Clock Recovery Control .............................. 180

USB Register Definition 21.6. FIFOn: USB0 Endpoint FIFO Access .......................... 182

USB Register Definition 21.7. FADDR: USB0 Function Address ............................... 183

USB Register Definition 21.8. POWER: USB0 Power ................................................ 185

USB Register Definition 21.9. FRAMEL: USB0 Frame Number Low ......................... 186

USB Register Definition 21.10. FRAMEH: USB0 Frame Number High ...................... 186

USB Register Definition 21.11. IN1INT: USB0 IN Endpoint Interrupt ......................... 187

USB Register Definition 21.12. OUT1INT: USB0 OUT Endpoint Interrupt ................. 188

USB Register Definition 21.13. CMINT: USB0 Common Interrupt ............................. 189

USB Register Definition 21.14. IN1IE: USB0 IN Endpoint Interrupt Enable ............... 190

USB Register Definition 21.15. OUT1IE: USB0 OUT Endpoint Interrupt Enable ....... 191

USB Register Definition 21.16. CMIE: USB0 Common Interrupt Enable .................... 192

USB Register Definition 21.17. E0CSR: USB0 Endpoint0 Control ............................. 195

USB Register Definition 21.18. E0CNT: USB0 Endpoint0 Data Count ....................... 196

Rev. 1.4

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