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CA5420A データシートの表示(PDF) - Intersil

部品番号
コンポーネント説明
メーカー
CA5420A Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
CA5420A
Ordering Information
PART NUMBER
(Note 3)
PART
MARKING
TEMP. RANGE
(°C)
PACKAGE
(Pb-Free)
PKG.
DWG. #
CA5420AM
5420A
-55 to +125
8 Ld SOIC
M8.15
CA5420AMZ (Notes 1, 2)
5420 AMZ
-55 to +125
8 Ld SOIC
(Tape and Reel)
M8.15
NOTES:
1. Add “96” suffix for Tape and Reel. Please refer to TB347 for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-
020.
3. For Moisture Sensitivity Level (MSL), please see device information page for CA5420A. For more information on MSL please see techbrief
TB363.
Pinout
NOTE: Pin is connected to Case.
CA5420A
(8 LD SOIC)
TOP VIEW
OFFSET
NULL
1
INV.
INPUT
2
-
NON-INV. 3
+
INPUT
V- 4
8 STROBE
7 V+
6 OUTPUT
5
OFFSET
NULL
2
FN1925.6
December 8, 2009

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