CMX649 データシートの表示（PDF） - CML Microsystems Plc

部品番号

コンポーネント説明

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CMX649

ADM Codec

CML Microsystems Plc 

ADM Codec

CMX649

REGISTER

NAME

DECODER

MODE AND

SETUP (1)

HEX

ADDRESS/

COMMAN

D

BIT 7

(D7)

$D0

DEC BY

4/8

BIT 6

(D6)

BIT 5

(D5)

Select PCM IN

BIT 4

(D4)

BIT3

(D3)

Select ADM IN

BIT 2

(D2)

BIT 1

(D1)

BIT 0

(D0)

Decoder Output

0

Select

(2)

DECODE ADM

CONTROL (1)

$D1

(2)

DECODE VAD

THRESHOLD

$D2

(1)

VAD Decay Time Constant

Syllabic Time Constant

Estimator Integrator

Principal Time Constant

VAD Attack Time

Constant

Select VAD Output

Source

0

Dynamic Range for Step Size

Integrator

Companding Rule

2nd Order Estimator

Time Constant

Zero location for

2nd Order

Dec Zero

Integration

Voice Activity Detector Threshold Setting Bits 15 - 8

(2)

Voice Activity Detector Threshold Setting Bits 7 - 0

DECODE OFF-

SET LEVEL (1)

$D3

(2)

DECODE

LINEAR PCM

$D7

INPUT (1)

Offset Input Level Bits 15 - 8

Offset Input Level Bits 7 – 0

Direct Write to DAC Input Bits 15 - 8

(2)

DECODE ADM

INPUT

ENCODER

MODE AND

SETUP (1)

(2)

ENCODE ADM

CONTROL (1)

(2)

ENCODE VAD

THRESHOLD

(1)

(2)

ENCODE OFF-

SET LEVEL (1)

(2)

Direct Write to DAC Input Bits 7 – 0

$D8

Decode ADM Input

$E0

DEC BY

Select PCM IN

4/8

Select ADM IN

Local Decoder

Output Select

Idle

Channel

Enhance

VAD Decay Time Constant

VAD Attack Time

Constant

Select VAD Output

Source

ADM

Output

Select

$E1

Syllabic Time Constant

Dynamic Range for Step Size

Integrator

Companding Rule

Estimator Integrator

Principal Time Constant

2nd Order Estimator

Time Constant

Zero location for

2nd Order

Dec Zero

Integration

$E2

Voice Activity Detector Threshold Setting Bits 15 - 8

Voice Activity Detector Threshold Setting Bits 7 - 0

$E3

Offset Input Level Bits 15 - 8

Offset Input Level Bits 7 – 0

© 2003 CML Microsystems Plc

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