CS51031GDR8(2001) データシートの表示（PDF） - ON Semiconductor

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CS51031GDR8
(Rev.:2001)

Fast PFET Buck Controller

ON Semiconductor 

CS51031

COSC

VREF

IC

7IC

1.5 V

VCC

VCC

VCCOK

VREF = 3.3 V

G3

IT

CS

IT

IT

55

5

1.5 V

Oscillator

+ Comparator

A1

–

G1

2.5 V

VC

RG

VGATE

Flip–Flop

RQ

F2

G2

SQ

VFB

Comparator

A6

1.25 V

VGATE

PGND

VFB

VREF

3.3 V

0.7 V

Hold Off

Comp

Fault

Comp 1.15 V

G4

CS Charge

Sense

Comparator

A4

CS

+ Comparator

A2

–

RQ

F1

2.5 V

2.4 V

G5

SQ

Slow Discharge

Flip–Flop

–

A3

+ Slow Discharge

Comparator

2.3 V

GND

Figure 2. Block Diagram

CIRCUIT DESCRIPTION

THEORY OF OPERATION

Control Scheme

The CS51031 monitors the output voltage to determine

when to turn on the PFET. If VFB falls below the internal

reference voltage of 1.25 V during the oscillator’s charge

cycle, the PFET is turned on and remains on for the duration

of the charge time. The PFET gets turned off and remains off

during the oscillator’s discharge time with the maximum

duty cycle to 80%. It requires 7.0 mV typical, and 20 mV

maximum ripple on the VFB pin is required to operate. This

method of control does not require any loop stability

compensation.

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