CS61584A データシートの表示（PDF） - Cirrus Logic
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CS61584A Datasheet PDF : 54 Pages
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DS261PP5
CS61584A
2. OVERVIEW
The CS61584A is a dual line interface for T1/E1
applications, designed for high-volume cards
where low power and high density are required.
The device can be operated in either Hardware
mode using control pins or in Host mode using an
internal register set. One board design can support
all T1/E1 short-haul modes by only changing com-
ponent values in the receive and transmit paths (if
REFCLK and TCLK are connected externally).
Figure 13 illustrates applications of the CS61584A
in various environments.
The line driver generates waveforms compatible
with E1 (CCITT G.703), T1 short haul (DSX-1)
and T1 FCC Part 68 Option A (DS1). A single
transformer turns ratio is used for all waveform
types. The driver internally matches the impedance
of the load, providing excellent return loss to insure
superior T1/E1 pulse quality. An additional benefit
of the internal impedance matching is a 50 percent
reduction in power consumption compared to im-
plementing return loss using external resistors that
causes the transmitter to drive the equivalent of two
line loads.
LOOP TIMED APPLICATION
REFCLK
CS62180B
FRAMER
TPOS
TNEG
TCLK
RCLK
RPOS
RNEG
JITTER
ATTENUATOR
CS61584A
LINE DRIVER
LINE RECEIVER
ASYNCHRONOUS MUX APPLICATION
(i.e., VT1.5 card for SONET or SDH mux)
REFCLK
CS61584A
TDATA
TCLK
MUX (gapped)
RCLK
RDATA
AMI
B8ZS,
HDB3,
CODER
JITTER
ATTENUATOR
AIS
DETECT
LINE DRIVER
LINE RECEIVER
TTIP
TRING
TRANSMIT
CIRCUITRY
RTIP
RRING
RECEIVE
CIRCUITRY
TTIP
TRING
TRANSMIT
CIRCUITRY
RTIP
RRING
RECEIVE
CIRCUITRY
SYNCHRONOUS APPLICATION
(Including 62411 systems with multiple T1 lines)
REFCLK
CS61584A
CS62180B
FRAMER
TCLK
TPOS
TNEG
RCLK
RPOS
RNEG
JITTER
ATTENUATOR
LINE DRIVER
LINE RECEIVER
TTIP
TRING
TRANSMIT
CIRCUITRY
RTIP
RRING
RECEIVE
CIRCUITRY
Figure 13. Examples of CS61584A Applications
DS261FP1P5
15
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