CS7622 データシートの表示（PDF） - Cirrus Logic

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CS7622

CCD Imager Analog Processor

Cirrus Logic 

CS7622

Black Level Control (MSB)

Default = 01h; Read/Write (address 0Ch)

Bit Number

Bit Name

Default

7

6

5

4

3

2

1

0

RESERVED

accumulator8

0

0

0

0

0

0

0

1

Bit

Mnemonic

Function

7:1

-

Reserved

Black Level Accumulator: is a 9 bit number representing an amount of offset

added to the input of the CDS circuit. The black level loop alters the black level

accumulator value to make the output of the ADC settle to code 64 during black

pixels. If desired the black loop may be disabled and written to manually to add

0

accumulator8

any desired amount of offset. There is a total of ~100 mV of offset range if the

offset range register setting is set to “1” or ~50 mV when this register setting is

set to “0”. This offset range is used to correct for CCD offsets plus internal off-

sets generated in the analog path of this chip. The offset range before subtract-

ing the internal offsets is as shown in the table below with the worst case

internal offsets being ±17 mV.(See Table 5)

Offset Range

(Reg 06h bit 0)

1

0

Max Offset

Blk Acc=511

~30 mV

~11 mV

Min Offset

Blk Acc=0

~-72 mV

~-40 mV

Table 5.

Accumulator

LSB Size

~0.2 mV

~0.1 mV

Black Level Control - General

The black loop is a feedback system that causes the ADC output to settle to 64 during the register defined

black pixels. This has the purpose of removing any CCD and system offsets and defining 64 as the known

black level. The loop has an exponential settling response and the time constant of this loop is effected

by the black loop gain and the number of black pixels to accumulate before updating the black accumu-

lator. See Figure 10 for a block diagram of the black level loop.

DS322PP1

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