M28W320 データシートの表示（PDF） - STMicroelectronics

部品番号

コンポーネント説明

メーカー

M28W320

32 Mbit (2Mb x16, Boot Block) 3V Supply Flash Memory

STMicroelectronics 

Bus operations

3

Bus operations

M28W320FCT, M28W320FCB

There are six standard bus operations that control the device. These are Bus Read, Bus

Write, Output Disable, Standby, Automatic Standby and Reset. See Table 2: Bus

Operations, for a summary.

Typically glitches of less than 5ns on Chip Enable or Write Enable are ignored by the

memory and do not affect bus operations.

3.1

Read

Read Bus operations are used to output the contents of the Memory Array, the Electronic

Signature, the Status Register and the Common Flash Interface. Both Chip Enable and

Output Enable must be at VIL in order to perform a read operation. The Chip Enable input

should be used to enable the device. Output Enable should be used to gate data onto the

output. The data read depends on the previous command written to the memory (see

Command Interface section). See Figure 8: Read AC Waveforms, and Table 16: Read AC

Characteristics, for details of when the output becomes valid.

Read mode is the default state of the device when exiting Reset or after power-up.

3.2

Write

Bus Write operations write Commands to the memory or latch Input Data to be

programmed. A write operation is initiated when Chip Enable and Write Enable are at VIL

with Output Enable at VIH. Commands, Input Data and Addresses are latched on the rising

edge of Write Enable or Chip Enable, whichever occurs first.

See Figure 9 and Figure 10, Write AC Waveforms, and Table 17 and Table 18, Write AC

Characteristics, for details of the timing requirements.

3.3

Output Disable

The data outputs are high impedance when the Output Enable is at VIH.

3.4

Standby

Standby disables most of the internal circuitry allowing a substantial reduction of the current

consumption. The memory is in stand-by when Chip Enable is at VIH and the device is in

read mode. The power consumption is reduced to the stand-by level and the outputs are set

to high impedance, independently from the Output Enable or Write Enable inputs. If Chip

Enable switches to VIH during a program or erase operation, the device enters Standby

mode when finished.

14/69

Share Link: