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M36DR432AD12ZA6 データシートの表示(PDF) - STMicroelectronics

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M36DR432AD12ZA6 Datasheet PDF : 52 Pages
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M36DR432AD, M36DR432BD
Table 18. Flash Read AC Characteristics
M36DR432AD, M36DR432BD
Symbol Alt
Parameter
Test Condition
85
100
120
Min Max Min Max Min Max
tAVAV
tRC
Address Valid to Next
Address Valid
EF = VIL, GF = VIL 85(3)
100
120
tAVQV
tACC
Address Valid to
Output Valid (Random)
EF = VIL, GF = VIL
85(3)
100
120
tAVQV1
tPAGE
Address Valid to
Output Valid (Page)
EF = VIL, GF = VIL
30(3)
35
45
tELQX (1)
tLZ
Chip Enable Low to
Output Transition
GF = VIL
0
0
0
tELQV (2)
tCE
Chip Enable Low to
Output Valid
GF = VIL
85(3)
100
120
tGLQX (1)
tOLZ
Output Enable Low to
Output Transition
EF = VIL
0
0
0
tGLQV (2)
tOE
Output Enable Low to
Output Valid
EF = VIL
25(3)
25
35
tEHQX
tOH
Chip Enable High to
Output Transition
GF = VIL
0
0
0
tEHQZ (1)
tHZ
Chip Enable High to
Output Hi-Z
GF = VIL
20(3)
25
35
tGHQX
tOH
Output Enable High to
Output Transition
EF = VIL
0
0
0
tGHQZ (1)
tDF
Output Enable High to
Output Hi-Z
EF = VIL
20(3)
25
35
tAXQX
tOH
Address Transition to
Output Transition
EF = VIL, GF = VIL
0
0
0
Note: 1. Sampled only, not 100% tested.
2. GF may be delayed by up to tELQV - tGLQV after the falling edge of EF without increasing tELQV.
3. To be characterized.
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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