M29DW323DB70N6T データシートの表示（PDF） - STMicroelectronics

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M29DW323DB70N6T

32 Mbit (4Mb x8 or 2Mb x16,Dual Bank 8:24, Boot Block) 3V Supply Flash Memory

STMicroelectronics 

M29DW323DT, M29DW323DB

REVISION HISTORY

Table 33. Document Revision History

Date

Version

Revision Details

20-Sep-2001 -01 First Issue (Target Specification)

26-Oct-2001 -02 Document expanded to full Product Preview

16-Jan-2002 -03 Corrections made in “Primary Algorithm-Specific Extended Query” Table in Appendix-B

19-Apr-2002

Description of Ready/Busy signal clarified (and Figure 16. modified)

-04

Clarified allowable commands during block erase

Clarified the mode the device returns to in the CFI Read Query command section

tPLYH (time to reset device) re-specified.

24-Apr-2002

-05

Values for addresses 23h and 25h corrected in CFI Query System Interface Information

table in Appendix B

19-Jul-2002

When in Extended Block mode, the block at the boot block address can be used as OTP.

-06 Data Toggle Flow chart corrected. Document promoted from “Product Preview” to

“Preliminary Data”.

08-Apr-2003

Revision numbering modified: a minor revision will be indicated by incrementing the digit

after the dot, and a major revision, by incrementing the digit before the dot (revision

version 06 equals 6.0).

Revision History moved to end of document.

TFBGA48, 6 x 8mm, 0.80mm pitch package added. Identification Current IID removed from

Table 14., DC Characteristics. Erase Suspend Latency time and Data Retention

6.1

parameters and notes added to Table 7., Program, Erase Times and Program, Erase

Endurance Cycles.

APPENDIX C., EXTENDED MEMORY BLOCK, added. Auto Select Command sued to

read the Extended Memory Block. Extended Memory Block Verify Code row added to

Tables 3 and 4, Bus Operations, BYTE = VIL and Bus Operations, BYTE = VIH. Bank

Address modified in Auto Select Command. Chip Erase Address modified in Table 8.,

Status Register Bits. VSS pin connection to ground clarified. Note added to Table

22., Ordering Information Scheme.

Table 20., TSOP48 Lead Plastic Thin Small Outline, 12x20 mm, Package Mechanical

07-May-2003 6.2 Data, and Figure 18., TSOP48 Lead Plastic Thin Small Outline, 12x20 mm, Bottom View

Package Outline, corrected.

25-Jun-2003

7.0

Document promoted from Preliminary Data to full Datasheet status. Packing option added

to Table 22., Ordering Information Scheme.

Status of Ready/Busy signal for Erase Suspend Operation modified in Table 8., Status

Register Bits.

18-Sep-2003 7.1 Figures 14 and 15, Toggle and Alternative Toggle Bits Mechanisms added.

Table 18., Toggle and Alternative Toggle Bits AC Characteristics, added.

Note 1 of Table 28., Device Geometry Definition, modified

Figures 14 and 15, Toggle and Alternative Toggle Bits Mechanisms modified and Notes 1

07-Oct-2003

7.2

and 2 added.

Table 18., Toggle and Alternative Toggle Bits AC Characteristics modified.

Figure 8. renamed and flowchart modified; Note added.

07-Nov-2003

7.3

Status of Ready/Busy signal for Program Error, Chip Erase and Block Erase modified in

Table 8., Status Register Bits.

49/51

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