CY7C04312BV データシートの表示（PDF） - Cypress Semiconductor
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CY7C04312BV Datasheet PDF : 37 Pages
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Switching Waveforms (continued)
Port 1 Write to Port 2 Read[40, 41, 42]
CLKP1
PORT-1
ADDRESS
tCYC2
tCH2
tCL2
tSA
tHA
An
R/WP1
tSW
tHW
PORT-1
DATAIN
tCKHZ
tSD
tHD
Dn
CLKP2
PORT-2
ADDRESS
tCYC2
tCL2
tCH2
tCCS
tSA
tHA
An
tCKLZ
CY7C0430BV
CY7C04312BV
CY7C04314BV
R/WP2
tCD2
PORT-2
DATAOUT
Qn
tDC
Notes:
40. CE0 = OE = LB = UB = CNTLD =VIL; CE1 = CNTRST = MRST = MKLD = MKRD = CNTRD = CNTINC =VIH.
41. This timing is valid when one port is writing, and one or more of the three other ports is reading the same location at the same time. If tCCS is violated, indeterminate
data will be read out.
42. If tCCS< minimum specified value, then Port 2 will read the most recent data (written by Port 1) only (2*tCYC2 + tCD2) after the rising edge of Port 2’s clock. If
tCCS > minimum specified value, then Port 2 will read the most recent data (written by Port 1) (tCYC2 + tCD2) after the rising edge of Port 2’s clock.
Document #: 38-06027 Rev. *A
Page 20 of 37
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