DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

CY7C1021CV26-15BAET(2010) データシートの表示(PDF) - Cypress Semiconductor

部品番号
コンポーネント説明
メーカー
CY7C1021CV26-15BAET
(Rev.:2010)
Cypress
Cypress Semiconductor Cypress
CY7C1021CV26-15BAET Datasheet PDF : 15 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
CY7C1021CV26
1-Mbit (64 K × 16) Static RAM
1-Mbit (64 K × 16) Static RAM
Features
Temperature Range
Automotive: –40 °C to 125 °C
High speed
tAA = 15 ns
Optimized voltage range: 2.5 V to 2.7 V
Low active power: 220 mW (Max)
Automatic power-down when deselected
Independent control of upper and lower bits
CMOS for optimum speed/power
Available in Pb-free and non Pb-free 44-pin TSOP II , 44-pin
(400-Mil) Molded SOJ and Pb-free 48-ball FPBGA packages
Functional Description
The CY7C1021CV26 is a high-performance CMOS static
RAM organized as 65,536 words by 16 bits. This device has
an automatic power-down feature that significantly reduces
power consumption when deselected.
Writing to the device is accomplished by taking Chip Enable
(CE) and Write Enable (WE) inputs LOW. If Byte Low Enable
(BLE) is LOW, then data from I/O pins (I/O1 through I/O8), is
written into the location specified on the address pins (A0
through A15). If Byte High Enable (BHE) is LOW, then data
from I/O pins (I/O9 through I/O16) is written into the location
specified on the address pins (A0 through A15).
Reading from the device is accomplished by taking Chip
Enable (CE) and Output Enable (OE) LOW while forcing the
Write Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW,
then data from the memory location specified by the address
pins will appear on I/O1 to I/O8. If Byte High Enable (BHE) is
LOW, then data from memory will appear on I/O9 to I/O16. See
the truth table at the end of this data sheet for a complete
description of Read and Write modes.
The input/output pins (I/O1 through I/O16) are placed in a
high-impedance state when the device is deselected (CE
HIGH), the outputs are disabled (OE HIGH), the BHE and BLE
are disabled (BHE, BLE HIGH), or during a Write operation
(CE LOW, and WE LOW).
Logic Block Diagram
DATA IN DRIVERS
A7
A6
A5
64K x 16
A4
RAM Array
A3
A2
A1
A0
COLUMN DECODER
I/O1–I/O8
I/O9–I/O16
BHE
WE
CE
OE
BLE
Cypress Semiconductor Corporation • 198 Champion Court
Document Number: 38-05589 Rev. *E
• San Jose, CA 95134-1709 • 408-943-2600
Revised December 1, 2010
[+] Feedback

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]