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UPD703014AYGC データシートの表示(PDF) - NEC => Renesas Technology

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UPD703014AYGC
NEC
NEC => Renesas Technology NEC
UPD703014AYGC Datasheet PDF : 48 Pages
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µPD703014A, 703014AY, 703015A, 703015AY, 703017A, 703017AY
Recommended Oscillator
(1) Main system clock oscillator (TA = –40 to +85°C)
(a) Connection of ceramic resonator or crystal resonator
X1
X2
Parameter
Symbol
Conditions
MIN. TYP. MAX. Unit
Oscillation frequency
fXX
VDD = 2.7 to 3.6 V
2
17
MHz
Oscillation stabilization time
VDD = 3.0 to 3.6 V
Upon reset release
2
20
MHz
219/fXX
s
Upon STOP mode release
Note
s
Note The TYP value differs depending on the setting of the oscillation stabilization time select register (OSTS).
Caution Ensure that the duty of oscillation waveform is between 45% and 55%.
Remarks 1. Connect the oscillator as close as possible to the X1 and X2 pins.
2. Do not route the wiring near broken lines.
3. Sufficiently evaluate the matching between the oscillator and resonator.
(b) External clock input
X1
X2
Open
High-speed CMOS inverter
External clock
Cautions
1. Connect the high-speed CMOS inverter as close as possible to the X1 pin.
2. Sufficiently evaluate the matching between the µPD703014A, 703014AY, 703015A,
703015AY, 703017A, 703017AY and the high-speed CMOS inverter.
20
Data Sheet U14526EJ2V0DS00

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