CY3681 データシートの表示（PDF） - Cypress Semiconductor

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CY3681

EZ-USB FX2™ USB Microcontroller

Cypress Semiconductor 

CY7C68013

Document History Page

Document Title: CY7C68013 EZ-USB FX2™ USB Microcontroller High-speed USB Peripheral Controller

Document Number: 38-08012

Orig. of

REV. ECN NO. Issue Date Change

Description of Change

**

111753 11/15/01

DSG Changed from Spec number: 38-00929 to 38-08012

*A

111802 02/20/02

KKU Updated functional changes between revision D part and revision E part

Changed timing data from simulation data to revision E characterization data

*B

115480 06/26/02

KKU Added new 56-pin Quad Flatpack No Lead package and pinout

Revised pin description table to reflect new package

Corrected Figure 9-8 by moving tsfd parameter location

Corrected labels on Dplus and Dminus in Table 4-1

Removed Preliminary from spec title

*C

120776 01/06/03

KKU Added bus powered references and PCB layout recommendations and QFN

package design notes

Updated QFN package drawing 51-85144 to current revision

*D

288810 See ECN MON Added lead-free packages

Added timing sequence diagrams for slave FIFO read and write

Changed PKTEND to FLAGS output propagation delay (asynchronous

interface) in Table 9-13from a max value of 70 ns to 115 ns

Changed FIFOADR[2:0] Hold Time (tFAH) for Asynchronous FIFO Interface as

follows:

SLRD/PKTEND to FIFOADR[2:0] Hold Time: 20 ns

SLWR to FIFOADR[2:0] Hold Time: 70 ns

*E

317674 See ECN MON Provided additional timing restrictions and requirement regarding the use of

PKTEND pin to commit a short one byte/word packet subsequent to committing

a packet automatically (when in auto mode).

Document #: 38-08012 Rev. *E

Page 48 of 48

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