CYRF69313-40LFXC データシートの表示（PDF） - Cypress Semiconductor

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CYRF69313-40LFXC

Programmable Radio-on-Chip LPstar

Cypress Semiconductor 

Pinouts

CYRF69313

Figure 1. 40-pin QFN pinout

Corner

tabs

P0.4 1

XTAL 2

VCC 3

P0.3 4

P0.1 5

VBAT1 6

VCC 7

P2.1 8

VBAT2 9

RFBIAS 10

CYRF69313

PRoC LPstar

* E- PAD Bottom Side

30 XOUT/ GPIO

29 MISO / GPIO

28 P1. 5 / MOSI

27 IRQ / GPIO

26 P1. 4 / SCK

25 P1. 3 / SS

24 P1. 2

23 VDD_ Micro

22 P1.1/D-

21 P1.0/D+

Pin Configuration

Pin

1

2

3, 7, 16, 40

4

5

6, 9, 39

8

10

11

12

13

14, 17, 18, 20,

36

15

19

21

22

23

24

25

26

Name

P0.4

Xtal_in

VCC

P0.3

P0.1

Vbat

P2.1

RF Bias

RFp

GND

RFn

NC

P2.0

RESV

P1.0 / D+

P1.1 / D–

VDD_micro

P1.2

P1.3 / nSS

P1.4 / SCK

Function

Individually configured GPIO

12 MHz Crystal. External clock in

Connected to pin 24 via 0.047 F capacitor

Individually configured GPIO

Individually configured GPIO

Connected to pin 24 via 0.047 Fshunt capacitor

GPIO. Port 2 Bit 1

RF pin voltage reference

Differential RF input to/from antenna

Ground

Differential RF to/from antenna

GPIO. Port 2 Bit 0

Reserved. Must connect to GND

GPIO 1.0 / Low speed USB I/O

GPIO 1.1 / Low speed USB I/O

4.0–5.5 for 12 MHz CPU/4.75–5.5 for 24 MHz CPU

Must be configured as 3.3 V output. It must have a 1–2 F output capacitor

Slave select SPI Pin

Serial Clock Pin from MCU function to radio function

Document Number: 001-66503 Rev. *C

Page 5 of 80

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