CYRF69313 データシートの表示（PDF） - Cypress Semiconductor
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CYRF69313 Datasheet PDF : 80 Pages
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CYRF69313
Pin Configuration (continued)
Pin
Name
Function
27
IRQ
Interrupt output, configure high/low or GPIO
28
P1.5 / MOSI Master Out Slave In
29
MISO Master In Slave Out, from radio function. Can be configured as GPIO
30
XOUT Bufferd CLK or GPIO
31
NC
Must be floating
32
P1.6 GPIO. Port 1 Bit 6
33
VIO
I/O interface voltage. Connected to pin 24 via 0.047 F
34
Reset Radio Reset. Connected to VDD via 0.47 F capacitor or to microcontroller GPIO pin. Must have a
RESET = HIGH event the very first time power is applied to the radio otherwise the state of the radio
function control registers is unknown
35
P1.7 GPIO. Port 1 Bit 7
36
VDD_1.8 Regulated logic bypass. Connected via 0.47 F to GND
37
GND Must be connected to ground
38
P0.7 GPIO. Port 0 Bit 7
41
E-pad Must be connected to GND
42
Corner Tabs Do not connect corner tabs
PRoC LPstar Functional Overview
The SoC contains a 2.4 GHz 1 Mbps GFSK radio transceiver,
packet data buffering, packet framer, DSSS baseband controller,
Received Signal Strength Indication (RSSI), and SPI interface
for data transfer and device configuration.
The radio supports 98 discrete 1 MHz channels (regulations may
limit the use of some of these channels in certain jurisdictions).
In DSSS modes the baseband performs DSSS
spreading/despreading, while in GFSK Mode (1 Mb/s - GFSK)
the baseband performs Start of Frame (SOF), End of Frame
(EOF) detection and CRC16 generation and checking. The
baseband may also be configured to automatically transmit
Acknowledge (ACK) handshake packets whenever a valid
packet is received.
When in receive mode, with packet framing enabled, the device
is always ready to receive data transmitted at any of the
supported bit rates. This enables the implementation of
mixed-rate systems in which different devices use different data
rates. This also enables the implementation of dynamic data rate
systems that use high data rates at shorter distances or in a
low-moderate interference environment or both. It changes to
lower data rates at longer distances or in high interference
environments or both.
The MCU function is an 8-bit Flash programmable
microcontroller with integrated low speed USB interface. The
instruction set has been optimized specifically for USB
operations, although it can be used for a variety of other
embedded applications.
The MCU function has up to eight Kbytes of Flash for user’s code
and up to 256 bytes of RAM for stack space and user variables.
In addition, the MCU function includes a Watchdog timer, a
vectored interrupt controller, a 16-bit Free-Running Timer, and
12-bit Programmable Interrupt Timer.
The MCU function supports in-system programming by using the
D+ and D– pins as the serial programming mode interface. The
programming protocol is not USB.
Document Number: 001-66503 Rev. *C
Page 6 of 80
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