GS-R4840NV データシートの表示（PDF） - STMicroelectronics

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GS-R4840NV

36 W NEGATIVE SWITCHING REGULATOR

STMicroelectronics 

GS-R4840NV

CONNECTION DIAGRAM AND MECHANICAL DATA

Package F. Dimensions in mm. (inches)

PIN DESCRIPTION

Pin

Function

Description

1 -Vin

2 Inhibit/

Enable

3 GND IN

4 +5V IN

5 DB0

6 DB1

7 DB2

8 DB3

9 DB4

10 DB5

11 CS

12 WR

13 -Vout

14 FAULT

Negative input voltage.

Remote Inhibit/Enable logically compatible with CMOS or open collector TTL. The

converter is OFF (Inhibit) when this pin is unconnected or the voltage applied is in the

range of 2 to 5V (referred to GND). The converter is ON (Enable) for a control voltage in

the range of 0 to 0.8V maximum.

Return for input voltage source and +5V logic supply voltage. Internally connected to pin

15.

+5V logic supply voltage. Maximum voltage must not exceed 7V.

Data bit 0 (LSB).

Data bit 1.

Data bit 2.

Data bit 3.

Data bit 4.

Data bit 5 (MSB).

Chip select. An active low input control which is the device enable input terminal.

Write control. An active low control which enables the microprocessor to write data to the

DAC.

Negative output voltage.

FAULT indication output (referred to GND). The FAULT signal is high (TTL compatible

level) when:

- the INHIBIT is ON (high)

- an output overload is present (Vo < 18V typ.)

- an overtemperature is present

- an overvoltage is present (Vo > Vo+5%)

15 GND OUT

Return for output voltage source. Internally connected to pin 3.

Note: Case internally connected to Ground.

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