DS2726 データシートの表示（PDF） - Maxim Integrated

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DS2726

5-Cell to 10-Cell Li+ Protector with Cell Balancing

Maxim Integrated 

5-Cell to 10-Cell Li+ Protector with

Cell Balancing

Detailed Description

The DS2726 provides the protection features for a

5-cell to 10-cell Li+ battery pack. The Li+ protection cir-

cuit allows for pin-configured selection of OV threshold

and the cell-balancing threshold. DOC and SC thresh-

olds and delays are component programmable.

Sleep Mode

Sleep Mode is a low-power state where the FETs are

open and the IC is not monitoring voltages. During

Wake Mode, the IC measures voltages and drives the

FETs to the appropriate state.

Upon initial connection to cells, the DS2726 enters

Sleep Mode. The IC also enters Sleep Mode if a UV

condition is detected. Sleep Mode can be initiated any

time by pulling the SLEEP pin low while a charger-

detect condition does not exist. During Sleep Mode

there is a pulldown current from PKP to GND.

VPKP must be within VTP of VVIN (VPKP > VVIN - VTP) to

exit wake from Sleep Mode.

When a charger is detected and VCC achieves regula-

tion, the part measures all cells for undervoltage and

overvoltage. Then the IC begins controlling the CC and

DC FETs as shown in Table 1. Care should be taken to

ensure that the SLEEP pin is not held low during a wake

condition.

Charger Detect

The DS2726 has two different methods for detecting a

charger connection. The methods are pin programma-

ble at the CBCFG pin. If CBCFG is pulled to GND, then

charge detection occurs when VPKP > VVIN + VCDET. If

CBCFG is pulled to VCC, then charge detection occurs

when the SLEEP pin is driven to a logic-high state.

Li+ Protection Circuitry

In Active Mode, the DS2726 constantly monitors V00–

V10 to protect the battery from overvoltage and under-

voltage. The voltage on the SNS pin is monitored and

compared to the voltages on RDOC and RSC to protect

against excessive discharge currents (discharge over-

current and short circuit). Table 1 summarizes the con-

ditions that activate the protection circuit, the response

of the DS2726, and the thresholds that release it from a

protection state.

Table 1. Li+ Protection Conditions and DS2726 Responses

CONDITION*

Overvoltage (OV)

THRESHOLD

VCELL > VOV

ACTIVATION

DELAY

tOVD

RESPONSE

CC Off

RELEASE THRESHOLD

VCELL < VCE

CBCFG < VIL and

VCELL < VUV_REL, then

VPKP > VVIN + VCDET (Note 13)

Undervoltage (UV)

(Note 15)

VCELL < VUV

tUVD

CC Off, DC Off,

Sleep Mode

CBCFG < VIL and

VCELL > VUV_REL, then

VPKP > VVIN - VTP

CBCFG > VIH then

SLEEP > VIH and

VPKP > VVIN - VTP

Discharge Overcurrent

(DOC) (Note 15)

VSNS < VRDOC

tDOCD

DC Off

VPKP > VVIN - VTP (Note 14)

Short Circuit (SC)

VSNS < VRSC

tSCD

DC Off

VPKP > VVIN - VTP (Note 15)

*All voltages are with respect to GND. CC Off: VCC = VPKP, DC Off: VDC = VVIN.

Note 13: The DC FET remains off until VCELL > VUV_REL.

Note 14: With test current ITST flowing from VIN to PKP.

Note 15: If a DOC condition persists indefinitely and a UV condition is reached, the IC does not enter Sleep Mode.

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