DSP56366 データシートの表示（PDF） - Motorola => Freescale

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DSP56366

Digital Signal Processor

Motorola => Freescale 

ED28

ED32

Freescale Semiconductor, Inc.

Chip Errata

DSP56366 Digital Signal Processor

Mask:2J26D

Errata Description

Applies

to Mask

Description (added 1/7/1997; identified as Documentation Errata 2/1/99): 2J26D

When two consecutive LAs have a conditional branch instruction at LA-1

of the internal loop, the part does not operate properly. For example, the

following sequence may generate incorrect results:

DO #5, LABEL1

NOP

DO #4, LABEL2

NOP

MOVE (R0) +

BSCC _DEST

internal loop

NOP

LABEL2

NOP

LABEL1

NOP

NOP

_DEST NOP

NOP

RTS

; conditional branch at LA-1 of

; internal LA

; external LA

Workaround: Put an additional NOP between LABEL2 and LABEL1.

Pertains to: DSP56300 Family Manual, Appendix B, Section B-4.1.3, “At

LA-1.”

Description (added 11/9/98; identified as a Documentation errata 2/1/99): 2J26D

When returning from a long interrupt (by RTI instruction), and the first

instruction after the RTI is a move to a DALU register (A, B, X, Y), the

move may not be correct, if the 16-bit arithmetic mode bit (bit 17 of SR) is

changed due to the restoring of SR after RTI.

Workaround:

Replace the RTI with the following sequence:

movec

nop

rti

ssl,sr

Pertains to: DSP56300 Family Manual. Add a new section to Appendix

B that is entitled “Sixteen-Bit Compatibility Mode Restrictions.”

DSP56366 Errata

 1997 -2001, Motorola

For Mor3e66ICnfEo2rJm26aDt_io0n_0On This Product,

Go to: www.freescale.com

NG 11/12/01 pg. 15 of 25

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