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EL2125CS(2005) データシートの表示(PDF) - Intersil

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EL2125CS Datasheet PDF : 15 Pages
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EL2125
Noise Calculations
The primary application for the EL2125 is to amplify very
small signals. To maintain the proper signal-to-noise ratio, it
is essential to minimize noise contribution from the amplifier.
Figure 51 below shows all the noise sources for all the
components around the amplifier.
R3
VIN
VR3
VN
IN+
+
-
VON
VR1
R1
IN-
VR2
R2
FIGURE 51.
• VN is the amplifier input voltage noise
• IN+ is the amplifier positive input current noise
• IN- is the amplifier negative input current noise
• VRX is the thermal noise associated with each resistor:
VRX = 4kTRx
where:
• k is Boltzmann's constant = 1.380658 x 10-23
• T is temperature in degrees Kelvin (273+ °C)
The total noise due to the amplifier seen at the output of the
amplifier can be calculated by using the equation below
(Figure 52).
As the equation shows, to keep noise at a minimum, small
resistor values should be used. At higher amplifier gain
configuration where R2 is reduced, the noise due to IN-, R2,
and R1 decreases and the noise caused by IN+, VN, and R3
starts to dominate. Because noise is summed in a root-
mean-squares method, noise sources smaller than 25% of
the largest noise source can be ignored. This can greatly
simplify the formula and make noise calculation much easier
to calculate.
Output Drive Capability
The EL2125 is designed to drive low impedance load. It can
easily drive 6VP-P signal into a 100load. This high output
drive capability makes the EL2125 an ideal choice for RF, IF,
and video applications. Furthermore, the EL2125 is current-
limited at the output, allowing it to withstand momentary
short to ground. However, the power dissipation with output-
shorted cannot exceed the power dissipation capability of
the package.
Driving Cables and Capacitive Loads
Although the EL2125 is designed to drive low impedance
load, capacitive loads will decrease the amplifier's phase
margin. As shown the in the performance curves, capacitive
load can result in peaking, overshoot and possible
oscillation. For optimum AC performance, capacitive loads
should be reduced as much as possible or isolated with a
series resistor between 5to 20. When driving coaxial
cables, double termination is always recommended for
reflection-free performance. When properly terminated, the
capacitance of the coaxial cable will not add to the capacitive
load seen by the amplifier.
Power Supply Bypassing And Printed Circuit
Board Layout
As with any high frequency devices, good printed circuit
board layout is essential for optimum performance. Ground
plane construction is highly recommended. Lead lengths
should be kept as short as possible. The power supply pins
must be closely bypassed to reduce the risk of oscillation.
The combination of a 4.7µF tantalum capacitor in parallel
with 0.1µF ceramic capacitor has been proven to work well
when placed at each supply pin. For single supply operation,
where pin 4 (VS-) is connected to the ground plane, a single
4.7µF tantalum capacitor in parallel with a 0.1µF ceramic
capacitor across pins 7 (VS+) and pin 4 (VS-) will suffice.
For good AC performance, parasitic capacitance should be
kept to a minimum. Ground plane construction again should
be used. Small chip resistors are recommended to minimize
series inductance. Use of sockets should be avoided since
they add parasitic inductance and capacitance which will
result in additional peaking and overshoot.
Supply Voltage Range and Single Supply
Operation
The EL2125 has been designed to operate with supply
voltage range of ±2.5V to ±15V. With a single supply, the
EL2125 will operate from +5V to +30V. Pins 4 and 7 are the
power supply pins. The positive power supply is connected
to pin 7. When used in single supply mode, pin 4 is
connected to ground. When used in dual supply mode, the
negative power supply is connected to pin 4.
As the power supply voltage decreases from +30V to +5V, it
becomes necessary to pay special attention to the input
VON =
BW ×
V
N2
×
1
+
RR-----12- 
2
+
IN-2
×
R12
+
IN+2
×
R32
×
1
+
R-R----12- 
2
+
4
×
K
×
T
×
R1
+
4
×
K
×
T
×
R2
×
RR-----12- 
2
+
4
×
K
×
T
×
R3
×
1
+
RR-----12-
2
FIGURE 52.
14
FN7045.2
April 21, 2005

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