EL5102ISZ データシートの表示（PDF） - Intersil

部品番号

コンポーネント説明

メーカー

EL5102ISZ

400MHz Slew Enhanced VFAs

Intersil 

EL5102, EL5103, EL5202, EL5203, EL5302

Closed Loop AC Electrical Specifications VS+ = +5V, VS- = -5V, TA = +25°C, VENABLE = +5V, AV = +1, RF = 0Ω, RL = 150Ω to

GND Pin, Unless Otherwise Specified. (Note 1)

PARAMETER

DESCRIPTION

CONDITIONS

MIN TYP MAX UNIT

BW

SR

tR,tF

OS

-3dB Bandwidth (VOUT = 400mVP-P)

Slew Rate

Rise Time, Fall Time

Overshoot

AV = 1, RF = 0Ω

AV = +2, RL = 100Ω, VOUT = -3V to +3V

RL = 500Ω, VOUT = -3V to +3V

±0.1V step

±0.1V step

1100

400

2200

4000

2.8

10

5000

MHz

V/µs

V/µs

ns

%

tS

0.1% Settling Time

VS = ±5V, RL = 500Ω, AV = 1, VOUT = ±3V

20

ns

dG

Differential Gain (Note 2)

AV = 2, RF = 1kΩ

0.01

%

dP

Differential Phase (Note 2)

AV = 2, RF = 1kΩ

0.01

°

eN

Input Noise Voltage

f = 10kHz

12

nV/√Hz

iN

Input Noise Current

f = 10kHz

11

pA/√Hz

tDIS

Disable Time (Note 3)

50

ns

tEN

Enable Time (Note 3)

25

ns

NOTES:

1. All AC tests are performed on a “warmed up” part, except slew rate, which is pulse tested.

2. Standard NTSC signal = 286mVP-P, f = 3.58MHz, as VIN is swept from 0.6V to 1.314V.RL is DC coupled.

3. Disable/Enable time is defined as the time from when the logic signal is applied to the ENABLE pin to when the supply current has reached half

its final value.

5

FN7331.8

January 17, 2008

Share Link: