MAX7000B データシートの表示（PDF） - Altera Corporation

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MAX7000B

Programmable Logic Device

Altera Corporation 

MAX 7000B Programmable Logic Device Data Sheet

Figure 6. I/O Control Block of MAX 7000B Devices

6 or 10 Global

Output Enable Signals (1)

PIA

OE Select Multiplexer

VCC

to Other I/O Pins

GND

from

Macrocell

Open-Drain Output

Slew-Rate Control

I/O Standards

Fast Input to

Macrocell

Register

Programmable Delay

to PIA

Programmable

Pull-up

Bus Hold Programmable

Ground

Note:

(1) EPM7032B, EPM7064B, EPM7128B, and EPM7256B devices have six output enable signals. EPM7512B devices have

ten output enable signals.

When the tri-state buffer control is connected to ground, the output is

tri-stated (high impedance) and the I/O pin can be used as a dedicated

input. When the tri-state buffer control is connected to VCC, the output is

enabled.

The MAX 7000B architecture provides dual I/O feedback, in which

macrocell and pin feedbacks are independent. When an I/O pin is

configured as an input, the associated macrocell can be used for buried

logic.

Altera Corporation

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