SST39LF200A_01 データシートの表示（PDF） - Silicon Storage Technology

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SST39LF200A_01

2 Mbit / 4 Mbit / 8 Mbit (x16) Multi-Purpose Flash

Silicon Storage Technology 

2 Mbit / 4 Mbit / 8 Mbit Multi-Purpose Flash

SST39LF200A / SST39LF400A / SST39LF800A

SST39VF200A / SST39VF400A / SST39VF800A

Data Sheet

TABLE 10: DC OPERATING CHARACTERISTICS

VDD = 3.0-3.6V FOR SST39LF200A/400A/800A AND 2.7-3.6V FOR SST39VF200A/400A/800A

Limits

Symbol Parameter

Min Max Units Test Conditions

IDD

ISB

ILI

ILO

VIL

VIH

VIHC

VOL

VOH

Power Supply Current

Read

Program and Erase

Standby VDD Current

Input Leakage Current

Output Leakage Current

Input Low Voltage

Input High Voltage

Input High Voltage (CMOS)

Output Low Voltage

Output High Voltage

30

30

20

1

10

0.8

0.7VDD

VDD-0.3

0.2

VDD-0.2

Address input = VIL/VIH, at f=1/TRC Min.,

VDD=VDD Max.

mA CE#=OE#=VIL,WE#=VIH, all I/Os open

mA CE#=WE#=VIL, OE#=VIH

µA CE#=VIHC, VDD = VDD Max.

µA VIN =GND to VDD, VDD = VDD Max.

µA VOUT =GND to VDD, VDD = VDD Max.

VDD = VDD Min.

V VDD = VDD Max.

V VDD = VDD Max.

V IOL = 100 µA, VDD = VDD Min.

V IOH = -100 µA, VDD = VDD Min.

T10.5 360

TABLE 11: RECOMMENDED SYSTEM POWER-UP TIMINGS

Symbol

Parameter

Minimum

Units

TPU-READ1

Power-up to Read Operation

100

µs

TPU-WRITE1

Power-up to Program/Erase Operation

100

µs

T11.0 360

1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.

TABLE 12: CAPACITANCE (Ta = 25°C, f=1 Mhz, other pins open)

Parameter

Description

Test Condition

Maximum

CI/O1

CIN1

I/O Pin Capacitance

Input Capacitance

VI/O = 0V

VIN = 0V

12 pF

6 pF

T12.0 360

1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.

TABLE 13: RELIABILITY CHARACTERISTICS

Symbol

Parameter

Minimum Specification Units Test Method

NEND1

Endurance

10,000

Cycles JEDEC Standard A117

TDR1

Data Retention

100

Years JEDEC Standard A103

ILTH1

Latch Up

100 + IDD

mA JEDEC Standard 78

T13.1 360

1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.

©2001 Silicon Storage Technology, Inc.

12

S71117-04-000 6/01 360

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