28F004BX-B データシートの表示（PDF） - Intel
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28F004BX-B Datasheet PDF : 50 Pages
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28F400BX-T B 28F004BX-T B
AC CHARACTERISTICS CE -CONTROLLED WRITE OPERATIONS(1 9)
Versions
VCC g 5%
VCC g10%
28F400BX-60(10)
28F004BX-60(10)
28F400BX-60(11) 28F400BX-80(11) 28F400BX-120(11) Unit
28F004BX-60(11) 28F004BX-80(11) 28F004BX-120(11)
Symbol
Parameter Notes Min
Max
Min
Max
Min
Max
Min
Max
tAVAV tWC Write Cycle Time
60
70
80
120
ns
tPHEL tPS RP High
Recovery
215
215
215
215
ns
to CE Going Low
tWLEL tWS WE Setup to
0
0
0
0
ns
CE Going Low
tPHHEH tPHS RP VHH Setup to 6 8 100
100
100
100
ns
CE Going High
tVPEH tVPS VPP Setup to CE 5 8 100
100
100
100
ns
Going High
tAVEH tAS Address Setup to 3
50
50
50
50
ns
CE Going High
tDVEH tDS Data Setup to
4
50
50
50
50
ns
CE Going High
tELEH tCP CE Pulse Width
50
50
60
60
ns
tEHDX tDH Data Hold from
4
0
0
0
0
ns
CE High
tEHAX tAH Address Hold
3
10
10
10
10
ns
from CE High
tEHWH tWH WE Hold from
10
10
10
10
ns
CE High
tEHEL tCPH CE Pulse
Width High
10
20
20
20
ns
tEHQV1
Duration of Word 2 5
6
6
6
6
ms
Byte Programming
Operation
tEHQV2
Duration of Erase 2 5 6 0 3
03
03
03
s
Operation (Boot)
tEHQV3
Duration of Erase 2 5 0 3
03
03
03
s
Operation
(Parameter)
tEHQV4
Duration of Erase 2 5 0 6
06
06
06
s
Operation (Main)
tQVVL tVPH VPP Hold from
58
0
0
0
0
ns
Valid SRD
tQVPH tPHH RP VHH Hold
68
0
0
0
0
ns
from Valid SRD
tPHBR
Boot-Block
7
100
100
100
Relock Delay
100 ns
46
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