GS816272CC データシートの表示（PDF） - Giga Semiconductor

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GS816272CC

256K x 72 18Mb S/DCD Sync Burst SRAMs

Giga Semiconductor 

Preliminary

GS816272CC-333/300/250/200/150

Flow Through Mode Timing (SCD)

Begin

CK

Read A

Cont

Cont

tKL

tKH

tKC

Write B Read C Read C+1 Read C+2 Read C+3 Read C Cont

Deselect

ADSP

ADSC

ADV

A0–An

GW

BW

Ba–Bd

E1

E2

E3

tS

tH

tS

tH

Fixed High

tS

AtHDSC initiated read

tS

tH

A

tS

tH

B

C

tS

tH

tS

tH

tS

tH

tS

tH

E2 and E3 only sampled with ADSC

tS

tH

Deselected with E1

G

DQa–DQd

tH

tS

tKQ

tOE

tOHZ

tLZ

tHZ

tKQX

Q(A)

D(B)

Q(C)

Q(C+1) Q(C+2) Q(C+3)

Q(C)

Rev: 1.01 2/2005

17/31

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

© 2004, GSI Technology

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