GS816273CC-250IV データシートの表示（PDF） - Giga Semiconductor

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GS816273CC-250IV

256K x 72 18Mb S/DCD Sync Burst SRAMs

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Preliminary

GS816273CC-250V

AC Electrical Characteristics

Parameter

Symbol

-250

Unit

Min

Max

Pipeline

Clock Cycle Time

Clock to Output Valid

Clock to Output Invalid

Clock to Output in Low-Z

Setup time

Hold time

tKC

4.0

—

ns

tKQ

—

3.0

ns

tKQX

1.5

—

ns

tLZ1

1.5

—

ns

tS

1.5

—

ns

tH

0.2

—

ns

Clock HIGH Time

tKH

1.3

—

ns

Clock LOW Time

tKL

1.7

—

ns

Clock to Output in

High-Z

tHZ1

1.5

3.0

ns

G to Output Valid

tOE

—

3.0

ns

G to output in Low-Z

G to output in High-Z

tOLZ1

tOHZ1

0

—

ns

—

3.0

ns

ZZ setup time

ZZ hold time

tZZS2

tZZH2

5

—

ns

1

—

ns

ZZ recovery

tZZR

20

—

ns

Notes:

1. These parameters are sampled and are not 100% tested.

2. ZZ is an asynchronous signal. However, in order to be recognized on any given clock cycle, ZZ must meet the specified setup and hold

times as specified above.

Rev: 1.01a 6/2006

15/28

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

© 2005, GSI Technology

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