HD404338 データシートの表示（PDF） - Renesas Electronics

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HD404338

4-bit HMCS400-Series microcomputer with large-capacity memory

Renesas Electronics 

HD404339 Series

Oscillator Circuit

Figure 18 shows a block diagram of the clock generation circuit. The system clock frequency of the

oscillator connected to OSC1 and OSC2 can be selected by system clock selection registers 1 and 2 (SSR1,

2: $027, $028) as shown in figures 20 and 21.

The system clock division ratio can be set by software to be 1/4, 1/8, 1/16, or 1/32. The subsystem clock

division ratio can be set by software to be 1/4 or 1/8.

OSC2

OSC1

X1

X2

LSON

System fOSC 1/4, 1/8, fcyc

oscillator

1/16, or

1/32 tcyc

division

circuit *1

Timing

generator

circuit

fX

fSUB

Sub-

system

1/8 or 1/4

Timing

division tsubcyc generator

oscillator

circuit * 2

circuit

øCPU

System

clock

selection

øPER

TMA3

CPU with ROM,

RAM, registers,

flags, and I/O

Peripheral

function

interrupt

1/8

division

circuit

Timing

fW generator

circuit

tWcyc

Time-base

clock øCLK

selection

Time-base

interrupt

Notes: 1. The system clock division ratio can be selected by setting bit 1 or 0 of the system

clock select register 2 (SSR2: $028).

2. The system clock division ratio can be selected by setting bit 2 of the system

clock select register 1 (SSR1: $027).

Figure 18 Clock Generation Circuit

26

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