HD404364 データシートの表示（PDF） - Renesas Electronics

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HD404364

4-bit HMCS400-Series microcomputer

Renesas Electronics 

HD404369 Series

Table 8

IMTA

0

1

Timer A Interrupt Mask (IMTA: 001, Bit 3)

Interrupt Request

Enabled

Disabled (masked)

Timer B Interrupt Request Flag (IFTB: $002, Bit 0): Set by overflow output from timer B, as listed in

table 9.

Table 9 Timer B Interrupt Request Flag (IFTB: $002, Bit 0)

IFTB

0

1

Interrupt Request

No

Yes

Timer B Interrupt Mask (IMTB: $002, Bit 1): Prevents (masks) an interrupt request caused by the timer

B interrupt request flag, as listed in table 10.

Table 10 Timer B Interrupt Mask (IMTB: $002, Bit 1)

IMTB

0

1

Interrupt Request

Enabled

Disabled (masked)

Timer C Interrupt Request Flag (IFTC: $002, Bit 2): Set by overflow output from timer C, as listed in

table 11.

Table 11 Timer C Interrupt Request Flag (IFTC: $002, Bit 2)

IFTC

0

1

Interrupt Request

No

Yes

Timer C Interrupt Mask (IMTC: $002, Bit 3): Prevents (masks) an interrupt request caused by the timer

C interrupt request flag, as listed in table 12.

Table 12 Timer C Interrupt Mask (IMTC: $002, Bit 3)

IMTC

0

1

Interrupt Request

Enabled

Disabled (masked)

24

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