HM5164165F Series, HM5165165F Series
DC Characteristics (HM5165165F Series)
HM5165165F
-5
-6
Parameter
Symbol Min Max Min Max Unit Test conditions
Operating current*1, *2
Standby current
I CC1
—
140 —
120 mA tRC = min
I CC2
—2
—
2
mA TTL interface
RAS, UCAS, LCAS = VIH
Dout = High-Z
—
0.5 —
0.5 mA CMOS interface
RAS, UCAS,
LCAS ≥ VCC – 0.2 V
Dout = High-Z
Standby current
(L-version)
I CC2
—
300 —
300 µA CMOS interface
RAS, UCAS,
LCAS ≥ VCC – 0.2 V
Dout = High-Z
RAS-only refresh current*2
I CC3
Standby current*1
I CC5
—
140 —
120 mA tRC = min
—5
—
5
mA RAS = VIH
UCAS, LCAS = VIL
Dout = enable
CAS-before-RAS refresh
current
I CC6
—
140 —
120 mA tRC = min
EDO page mode current*1, *3 ICC7
—
120 —
110 mA RAS = VIL , CAS cycle,
tHPC = tHPC min
Battery backup current*4
I CC10
—
1.2 —
1.2 mA CMOS interface
(Standby with CBR refresh)
Dout = High-Z
(L-version)
CBR refresh: tRC = 15.6 µs
tRAS ≤ 0.3 µs
Self refresh mode current
(L-version)
I CC11
—
500 —
500 µA CMOS interface
RAS, UCAS, LCAS ≤ 0.2 V
Dout = High-Z
Input leakage current
Output leakage current
I LI
–5 5
–5 5
µA 0 V ≤ Vin ≤ VCC + 0.3 V
I LO
–5 5
–5 5
µA 0 V ≤ Vout ≤ VCC
Dout = disable
Output high voltage
VOH
2.4
VCC
2.4
VCC
V
High Iout = –2 mA
Output low voltage
VOL
0
0.4 0
0.4 V Low Iout = 2 mA
Notes: 1. ICC depends on output load condition when the device is selected. ICC max is specified at the output
open condition.
2. Address can be changed once or less while RAS = VIL.
3. Measured with one sequential address change per EDO cycle, tHPC.
4. VIH ≥ VCC – 0.2 V, 0 V ≤ VIL ≤ 0.2 V.
10