HT46R064G/065G/0662G
Enhanced A/D Type 8-Bit OTP MCU with OPA
Ta=25°C
Symbol
Parameter
VIH1
VIL2
VIH2
VLVR1
VLVR2
VLVR3
IOL1
Input High Voltage for I/O,
TCn and INT
Input Low Voltage (RES)
Input High Voltage (RES)
Low Voltage Reset 1
Low Voltage Reset 2
Low Voltage Reset 3
I/O Port Sink Current
(PA, PB, PC)
IOH
I/O Port Source Current
IOL2
PA7 Sink Current
RPH
Pull-high Resistance
ISCOM SCOM Operating Current
VSCOM VDD/2 Voltage for LCD COM
VOPBIAS
OPA/Comparator bias voltage
Deviation (Bias=0.7/0.5/0.1VDD
Selected by A1PS[2:0],
A0PS[2:0], CPS[2:0] Bits)
GOP
OPA1 Gain Deviation (Software
Gain Controlled by A1G[2:0]
Test Conditions
VDD
Conditions
¾
¾
¾
¾
¾
¾
¾ VLVR = 4.2V
¾ VLVR = 3.15V
¾ VLVR = 2.1V
3V
VOL=0.1VDD
5V
3V
VOH=0.9VDD
5V
5V VOL=0.1VDD
3V
¾
5V
¾
SCOMC, ISEL[1:0]=00
SCOMC, ISEL[1:0]=01
5V
SCOMC, ISEL[1:0]=10
SCOMC, ISEL[1:0]=11
5V No load
3V No load
3V No load
Min. Typ. Max. Unit
0.7VDD ¾
VDD
V
0
¾ 0.4VDD V
0.9VDD ¾
VDD
V
3.98 4.2 4.42
V
2.98 3.15 3.32
V
1.98 2.1 2.22
V
4
8
¾
mA
10
20
¾
mA
-2
-4
¾
mA
-5
-10
¾
mA
2
3
¾
mA
20
60
100
kW
10
30
50
kW
17.5 25.0 32.5 mA
35
50
65
mA
70
100 130
mA
140 200 260 mA
0.475 0.500 0.525 VDD
0.665 0.700 0.735 VDD
0.475 0.500 0.525 VDD
0.995 0.100 0.105 VDD
-5
¾
+5
%
Note: The standby current (ISTB1~ISTB3) and IDD4 are measured with all I/O pins in input mode and tied to VDD.
Rev. 1.00
16
March 3, 2011